Commit f2bc0756 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers 



Despite using the same compatible values ("r8a7795"-based) because of
historical reasons, R-Car H3 ES1.x (R8A77950) and R-Car H3 ES2.0+
(R8A77951) are really different SoCs, with different part numbers, and
with different Pin Function Controller blocks.

Reflect this in the pinctrl configuration, by replacing the existing
CONFIG_PINCTRL_PFC_R8A7795 symbol by two new config symbols:
CONFIG_PINCTRL_PFC_R8A77950 and CONFIG_PINCTRL_PFC_R8A77951.  The latter
are selected automatically, depending on the soon-to-be-introduced
corresponding SoC-specific config options, and on the current common
config option, to relax dependencies.

Rename the individual pin control driver source files from
pfc-r8a7795-es1.c to pfc-r8a77950.c, and from pfc-r8a7795.c to
pfc-r8a77951.c, and make them truly independent.
As both SoCs share the same compatible value, special care must be taken
to match them to the correct pin control driver, if support for it is
included in the running kernel.

This will allow making support for early R-Car H3 revisions optional,
the largest share of which is taken by the pin control driver.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191230083156.19191-1-geert+renesas@glider.be
parent b4fba344

drivers/pinctrl/sh-pfc/Kconfig

+7 −3
Original line number Diff line number Diff line
@@ -26,7 +26,8 @@ config PINCTRL_SH_PFC 
	select PINCTRL_PFC_R8A7792 if ARCH_R8A7792

	select PINCTRL_PFC_R8A7793 if ARCH_R8A7793

	select PINCTRL_PFC_R8A7794 if ARCH_R8A7794

	select PINCTRL_PFC_R8A7795 if ARCH_R8A7795

	select PINCTRL_PFC_R8A77950 if ARCH_R8A77950 || ARCH_R8A7795

	select PINCTRL_PFC_R8A77951 if ARCH_R8A77951 || ARCH_R8A7795

	select PINCTRL_PFC_R8A77960 if ARCH_R8A77960

	select PINCTRL_PFC_R8A77961 if ARCH_R8A77961

	select PINCTRL_PFC_R8A77965 if ARCH_R8A77965
@@ -115,8 +116,11 @@ config PINCTRL_PFC_R8A7793 
config PINCTRL_PFC_R8A7794

	bool "R-Car E2 pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A7795

	bool "R-Car H3 pin control support" if COMPILE_TEST

config PINCTRL_PFC_R8A77950

	bool "R-Car H3 ES1.x pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A77951

	bool "R-Car H3 ES2.0+ pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A77960

	bool "R-Car M3-W pin control support" if COMPILE_TEST

drivers/pinctrl/sh-pfc/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -18,8 +18,8 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o 
obj-$(CONFIG_PINCTRL_PFC_R8A7792)	+= pfc-r8a7792.o

obj-$(CONFIG_PINCTRL_PFC_R8A7793)	+= pfc-r8a7791.o

obj-$(CONFIG_PINCTRL_PFC_R8A7794)	+= pfc-r8a7794.o

obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795.o

obj-$(CONFIG_PINCTRL_PFC_R8A7795)	+= pfc-r8a7795-es1.o

obj-$(CONFIG_PINCTRL_PFC_R8A77950)	+= pfc-r8a77950.o

obj-$(CONFIG_PINCTRL_PFC_R8A77951)	+= pfc-r8a77951.o

obj-$(CONFIG_PINCTRL_PFC_R8A77960)	+= pfc-r8a7796.o

obj-$(CONFIG_PINCTRL_PFC_R8A77961)	+= pfc-r8a7796.o

obj-$(CONFIG_PINCTRL_PFC_R8A77965)	+= pfc-r8a77965.o

drivers/pinctrl/sh-pfc/core.c

+44 −13
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/platform_device.h>

#include <linux/psci.h>

#include <linux/slab.h>

#include <linux/sys_soc.h>



#include "core.h"
@@ -568,18 +569,18 @@ static const struct of_device_id sh_pfc_of_table[] = { 
		.data = &r8a7794_pinmux_info,

	},

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A7795

/* Both r8a7795 entries must be present to make sanity checks work */

#ifdef CONFIG_PINCTRL_PFC_R8A77950

	{

		.compatible = "renesas,pfc-r8a7795",

		.data = &r8a7795_pinmux_info,

		.data = &r8a77950_pinmux_info,

	},

#ifdef DEBUG

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A77951

	{

		/* For sanity checks only (nothing matches against this) */

		.compatible = "renesas,pfc-r8a77950",	/* R-Car H3 ES1.0 */

		.data = &r8a7795es1_pinmux_info,

		.compatible = "renesas,pfc-r8a7795",

		.data = &r8a77951_pinmux_info,

	},

#endif /* DEBUG */

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A77960

	{
@@ -886,19 +887,49 @@ static void __init sh_pfc_check_driver(const struct platform_driver *pdrv) 
static inline void sh_pfc_check_driver(struct platform_driver *pdrv) {}

#endif /* !DEBUG */



#ifdef CONFIG_OF

static const void *sh_pfc_quirk_match(void)

{

#if defined(CONFIG_PINCTRL_PFC_R8A77950) || \

    defined(CONFIG_PINCTRL_PFC_R8A77951)

	const struct soc_device_attribute *match;

	static const struct soc_device_attribute quirks[] = {

		{

			.soc_id = "r8a7795", .revision = "ES1.*",

			.data = &r8a77950_pinmux_info,

		},

		{

			.soc_id = "r8a7795",

			.data = &r8a77951_pinmux_info,

		},



		{ /* sentinel */ }

	};



	match = soc_device_match(quirks);

	if (match)

		return match->data ?: ERR_PTR(-ENODEV);

#endif /* CONFIG_PINCTRL_PFC_R8A77950 || CONFIG_PINCTRL_PFC_R8A77951 */



	return NULL;

}

#endif /* CONFIG_OF */



static int sh_pfc_probe(struct platform_device *pdev)

{

#ifdef CONFIG_OF

	struct device_node *np = pdev->dev.of_node;

#endif

	const struct sh_pfc_soc_info *info;

	struct sh_pfc *pfc;

	int ret;



#ifdef CONFIG_OF

	if (np)

	if (pdev->dev.of_node) {

		info = sh_pfc_quirk_match();

		if (IS_ERR(info))

			return PTR_ERR(info);



		if (!info)

			info = of_device_get_match_data(&pdev->dev);

	else

	} else

#endif

		info = (const void *)platform_get_device_id(pdev)->driver_data;

drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c→drivers/pinctrl/sh-pfc/pfc-r8a77950.c

+13 −13
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * R8A7795 ES1.x processor support - PFC hardware block.

 * R8A77950 processor support - PFC hardware block.

 *

 * Copyright (C) 2015-2017  Renesas Electronics Corporation

 */
@@ -5562,7 +5562,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { 
	{ /* sentinel */ },

};



static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,

static int r8a77950_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,

				   u32 *pocctrl)

{

	int bit = -EINVAL;
@@ -5820,7 +5820,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { 
	{ /* sentinel */ },

};



static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,

static unsigned int r8a77950_pinmux_get_bias(struct sh_pfc *pfc,

					     unsigned int pin)

{

	const struct pinmux_bias_reg *reg;
@@ -5838,7 +5838,7 @@ static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc, 
		return PIN_CONFIG_BIAS_PULL_DOWN;

}



static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,

static void r8a77950_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,

				     unsigned int bias)

{

	const struct pinmux_bias_reg *reg;
@@ -5861,15 +5861,15 @@ static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, 
	sh_pfc_write(pfc, reg->puen, enable);

}



static const struct sh_pfc_soc_operations r8a7795es1_pinmux_ops = {

	.pin_to_pocctrl = r8a7795es1_pin_to_pocctrl,

	.get_bias = r8a7795es1_pinmux_get_bias,

	.set_bias = r8a7795es1_pinmux_set_bias,

static const struct sh_pfc_soc_operations r8a77950_pinmux_ops = {

	.pin_to_pocctrl = r8a77950_pin_to_pocctrl,

	.get_bias = r8a77950_pinmux_get_bias,

	.set_bias = r8a77950_pinmux_set_bias,

};



const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {

const struct sh_pfc_soc_info r8a77950_pinmux_info = {

	.name = "r8a77950_pfc",

	.ops = &r8a7795es1_pinmux_ops,

	.ops = &r8a77950_pinmux_ops,

	.unlock_reg = 0xe6060000, /* PMMR */



	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },

drivers/pinctrl/sh-pfc/pfc-r8a7795.c→drivers/pinctrl/sh-pfc/pfc-r8a77951.c

+13 −26
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * R8A7795 ES2.0+ processor support - PFC hardware block.

 * R8A77951 processor support - PFC hardware block.

 *

 * Copyright (C) 2015-2019 Renesas Electronics Corporation

 */
@@ -5915,7 +5915,8 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { 
	{ /* sentinel */ },

};



static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)

static int r8a77951_pin_to_pocctrl(struct sh_pfc *pfc,

				   unsigned int pin, u32 *pocctrl)

{

	int bit = -EINVAL;
@@ -6172,7 +6173,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { 
	{ /* sentinel */ },

};



static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,

static unsigned int r8a77951_pinmux_get_bias(struct sh_pfc *pfc,

					     unsigned int pin)

{

	const struct pinmux_bias_reg *reg;
@@ -6190,7 +6191,7 @@ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc, 
		return PIN_CONFIG_BIAS_PULL_DOWN;

}



static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,

static void r8a77951_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,

				     unsigned int bias)

{

	const struct pinmux_bias_reg *reg;
@@ -6213,29 +6214,15 @@ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, 
	sh_pfc_write(pfc, reg->puen, enable);

}



static const struct soc_device_attribute r8a7795es1[] = {

	{ .soc_id = "r8a7795", .revision = "ES1.*" },

	{ /* sentinel */ }

static const struct sh_pfc_soc_operations r8a77951_pinmux_ops = {

	.pin_to_pocctrl = r8a77951_pin_to_pocctrl,

	.get_bias = r8a77951_pinmux_get_bias,

	.set_bias = r8a77951_pinmux_set_bias,

};



static int r8a7795_pinmux_init(struct sh_pfc *pfc)

{

	if (soc_device_match(r8a7795es1))

		pfc->info = &r8a7795es1_pinmux_info;



	return 0;

}



static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = {

	.init = r8a7795_pinmux_init,

	.pin_to_pocctrl = r8a7795_pin_to_pocctrl,

	.get_bias = r8a7795_pinmux_get_bias,

	.set_bias = r8a7795_pinmux_set_bias,

};



const struct sh_pfc_soc_info r8a7795_pinmux_info = {

const struct sh_pfc_soc_info r8a77951_pinmux_info = {

	.name = "r8a77951_pfc",

	.ops = &r8a7795_pinmux_ops,

	.ops = &r8a77951_pinmux_ops,

	.unlock_reg = 0xe6060000, /* PMMR */



	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },

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