Commit f21ab790 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'clk-meson-dt-v5.5-1' of git://github.com/BayLibre/clk-meson into v5.5/dt64-redo 

First round of amlogic DT binding clock update target for v5.5

Add the audio clock and reset bindings for the sm1 SoC family

* tag 'clk-meson-dt-v5.5-1' of git://github.com/BayLibre/clk-meson:
  dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
  dt-bindings: clk: axg-audio: add sm1 bindings
parents 016a4d6b aa03ea9b

Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt

+2 −1
Original line number Diff line number Diff line
@@ -7,7 +7,8 @@ devices. 
Required Properties:



- compatible	: should be "amlogic,axg-audio-clkc" for the A113X and A113D,

		  "amlogic,g12a-audio-clkc" for G12A.

		  "amlogic,g12a-audio-clkc" for G12A,

		  "amlogic,sm1-audio-clkc" for S905X3.

- reg		: physical base address of the clock controller and length of

		  memory mapped region.

- clocks	: a list of phandle + clock-specifier pairs for the clocks listed

include/dt-bindings/clock/axg-audio-clkc.h

+10 −0
Original line number Diff line number Diff line
@@ -80,5 +80,15 @@ 
#define AUD_CLKID_TDM_SCLK_PAD0		160

#define AUD_CLKID_TDM_SCLK_PAD1		161

#define AUD_CLKID_TDM_SCLK_PAD2		162

#define AUD_CLKID_TOP			163

#define AUD_CLKID_TORAM			164

#define AUD_CLKID_EQDRC			165

#define AUD_CLKID_RESAMPLE_B		166

#define AUD_CLKID_TOVAD			167

#define AUD_CLKID_LOCKER		168

#define AUD_CLKID_SPDIFIN_LB		169

#define AUD_CLKID_FRDDR_D		170

#define AUD_CLKID_TODDR_D		171

#define AUD_CLKID_LOOPBACK_B		172



#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */

include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h

+15 −0
Original line number Diff line number Diff line
@@ -35,4 +35,19 @@ 
#define AUD_RESET_TOHDMITX	24

#define AUD_RESET_CLKTREE	25



/* SM1 added resets */

#define AUD_RESET_RESAMPLE_B	26

#define AUD_RESET_TOVAD		27

#define AUD_RESET_LOCKER	28

#define AUD_RESET_SPDIFIN_LB	29

#define AUD_RESET_FRATV		30

#define AUD_RESET_FRHDMIRX	31

#define AUD_RESET_FRDDR_D	32

#define AUD_RESET_TODDR_D	33

#define AUD_RESET_LOOPBACK_B	34

#define AUD_RESET_EARCTX	35

#define AUD_RESET_EARCRX	36

#define AUD_RESET_FRDDR_E	37

#define AUD_RESET_TODDR_E	38



#endif

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