Commit f20387df authored by Michael Tretter's avatar Michael Tretter Committed by Mauro Carvalho Chehab
Browse files

media: allegro: add Allegro DVT video IP core driver 



Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device
Technical Reference Manual uses the term VCU (Video Codec Unit) for the
encoder, decoder and system integration block.

This driver takes care of interacting with the MicroBlaze MCU that
controls the actual IP cores. The IP cores and MCU are integrated in the
FPGA. The xlnx_vcu driver is responsible for configuring the clocks and
providing information about the codec configuration.

The driver currently only supports the H.264 video encoder.

Signed-off-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent 8df39e16

MAINTAINERS

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@@ -668,6 +668,13 @@ S: Maintained 
F:	Documentation/i2c/busses/i2c-ali1563

F:	drivers/i2c/busses/i2c-ali1563.c



ALLEGRO DVT VIDEO IP CORE DRIVER

M:	Michael Tretter <m.tretter@pengutronix.de>

R:	Pengutronix Kernel Team <kernel@pengutronix.de>

L:	linux-media@vger.kernel.org

S:	Maintained

F:	drivers/staging/media/allegro-dvt/



ALLWINNER SECURITY SYSTEM

M:	Corentin Labbe <clabbe.montjoie@gmail.com>

L:	linux-crypto@vger.kernel.org

drivers/staging/media/Kconfig

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@@ -20,6 +20,8 @@ menuconfig STAGING_MEDIA 
if STAGING_MEDIA && MEDIA_SUPPORT



# Please keep them in alphabetic order

source "drivers/staging/media/allegro-dvt/Kconfig"



source "drivers/staging/media/bcm2048/Kconfig"



source "drivers/staging/media/davinci_vpfe/Kconfig"

drivers/staging/media/Makefile

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# SPDX-License-Identifier: GPL-2.0

obj-$(CONFIG_VIDEO_ALLEGRO_DVT)	+= allegro-dvt/

obj-$(CONFIG_I2C_BCM2048)	+= bcm2048/

obj-$(CONFIG_VIDEO_IMX_MEDIA)	+= imx/

obj-$(CONFIG_VIDEO_DM365_VPFE)	+= davinci_vpfe/

drivers/staging/media/allegro-dvt/Kconfig

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# SPDX-License-Identifier: GPL-2.0

config VIDEO_ALLEGRO_DVT

	tristate "Allegro DVT Video IP Core"

	depends on VIDEO_DEV && VIDEO_V4L2

	depends on ARCH_ZYNQMP || COMPILE_TEST

	select V4L2_MEM2MEM_DEV

	select VIDEOBUF2_DMA_CONTIG

	select REGMAP

	select REGMAP_MMIO

	help

	  Support for the encoder video IP core by Allegro DVT. This core is

	  found for example on the Xilinx ZynqMP SoC in the EV family and is

	  called VCU in the reference manual.



	  To compile this driver as a module, choose M here: the module

	  will be called allegro.

drivers/staging/media/allegro-dvt/Makefile

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# SPDX-License-Identifier: GPL-2.0

allegro-objs := allegro-core.o



obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro.o

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