Commit f1f76d7a authored by Wambui Karuga's avatar Wambui Karuga Committed by Jani Nikula
Browse files

drm/i915/vlv_dsi: conversion to drm_device based logging macros.



Converts the printk based logging macros to the struct drm_device based
logging macros in i915/display/vlv_dsi.c.
This was done using the following coccinelle script that transforms
based on the existence of a drm_i915_private device pointer.
@@
identifier fn, T;
@@

fn(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-DRM_INFO(
+drm_info(&T->drm,
...)
|
-DRM_ERROR(
+drm_err(&T->drm,
...)
|
-DRM_WARN(
+drm_warn(&T->drm,
...)
|
-DRM_DEBUG(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(&T->drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(&T->drm,
...)
)
...+>
}

@@
identifier fn, T;
@@

fn(...,struct drm_i915_private *T,...) {
<+...
(
-DRM_INFO(
+drm_info(&T->drm,
...)
|
-DRM_ERROR(
+drm_err(&T->drm,
...)
|
-DRM_WARN(
+drm_warn(&T->drm,
...)
|
-DRM_DEBUG(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(&T->drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(&T->drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(&T->drm,
...)
)
...+>
}

Checkpatch warnings were addressed manually.

Signed-off-by: default avatarWambui Karuga <wambui.karugax@gmail.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200130083229.12889-3-wambui.karugax@gmail.com
parent b2f7c0f1
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+46 −34
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port)

	if (intel_de_wait_for_set(dev_priv, MIPI_GEN_FIFO_STAT(port),
				  mask, 100))
		DRM_ERROR("DPI FIFOs are not empty\n");
		drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n");
}

static void write_data(struct drm_i915_private *dev_priv,
@@ -154,7 +154,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
	if (packet.payload_length) {
		if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port),
					    data_mask, 50))
			DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n");
			drm_err(&dev_priv->drm,
				"Timeout waiting for HS/LP DATA FIFO !full\n");

		write_data(dev_priv, data_reg, packet.payload,
			   packet.payload_length);
@@ -167,7 +168,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,

	if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port),
				    ctrl_mask, 50)) {
		DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n");
		drm_err(&dev_priv->drm,
			"Timeout waiting for HS/LP CTRL FIFO !full\n");
	}

	intel_de_write(dev_priv, ctrl_reg,
@@ -178,7 +180,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
		data_mask = GEN_READ_DATA_AVAIL;
		if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port),
					  data_mask, 50))
			DRM_ERROR("Timeout waiting for read data.\n");
			drm_err(&dev_priv->drm,
				"Timeout waiting for read data.\n");

		read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len);
	}
@@ -229,13 +232,15 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,

	/* XXX: old code skips write if control unchanged */
	if (cmd == intel_de_read(dev_priv, MIPI_DPI_CONTROL(port)))
		DRM_DEBUG_KMS("Same special packet %02x twice in a row.\n", cmd);
		drm_dbg_kms(&dev_priv->drm,
			    "Same special packet %02x twice in a row.\n", cmd);

	intel_de_write(dev_priv, MIPI_DPI_CONTROL(port), cmd);

	mask = SPL_PKT_SENT_INTERRUPT;
	if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), mask, 100))
		DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd);
		drm_err(&dev_priv->drm,
			"Video mode command 0x%08x send failed.\n", cmd);

	return 0;
}
@@ -267,7 +272,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder,
	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
	int ret;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");
	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	if (fixed_mode) {
@@ -354,7 +359,7 @@ static bool glk_dsi_enable_io(struct intel_encoder *encoder)
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),
					  GLK_MIPIIO_PORT_POWERED, 20))
			DRM_ERROR("MIPIO port is powergated\n");
			drm_err(&dev_priv->drm, "MIPIO port is powergated\n");
	}

	/* Check for cold boot scenario */
@@ -377,7 +382,7 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder)
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),
					  GLK_PHY_STATUS_PORT_READY, 20))
			DRM_ERROR("PHY is not ON\n");
			drm_err(&dev_priv->drm, "PHY is not ON\n");
	}

	/* Get IO out of reset */
@@ -403,7 +408,7 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder)
			/* Wait for ULPS active */
			if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),
						    GLK_ULPS_NOT_ACTIVE, 20))
				DRM_ERROR("ULPS not active\n");
				drm_err(&dev_priv->drm, "ULPS not active\n");

			/* Exit ULPS */
			val = intel_de_read(dev_priv, MIPI_DEVICE_READY(port));
@@ -427,14 +432,16 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder)
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port),
					  GLK_DATA_LANE_STOP_STATE, 20))
			DRM_ERROR("Date lane not in STOP state\n");
			drm_err(&dev_priv->drm,
				"Date lane not in STOP state\n");
	}

	/* Wait for AFE LATCH */
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_set(dev_priv, BXT_MIPI_PORT_CTRL(port),
					  AFE_LATCHOUT, 20))
			DRM_ERROR("D-PHY not entering LP-11 state\n");
			drm_err(&dev_priv->drm,
				"D-PHY not entering LP-11 state\n");
	}
}

@@ -445,7 +452,7 @@ static void bxt_dsi_device_ready(struct intel_encoder *encoder)
	enum port port;
	u32 val;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	/* Enable MIPI PHY transparent latch */
	for_each_dsi_port(port, intel_dsi->ports) {
@@ -473,7 +480,7 @@ static void vlv_dsi_device_ready(struct intel_encoder *encoder)
	enum port port;
	u32 val;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	vlv_flisdsi_get(dev_priv);
	/* program rcomp for compliance, reduce from 50 ohms to 45 ohms
@@ -540,14 +547,15 @@ static void glk_dsi_enter_low_power_mode(struct intel_encoder *encoder)
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),
					    GLK_PHY_STATUS_PORT_READY, 20))
			DRM_ERROR("PHY is not turning OFF\n");
			drm_err(&dev_priv->drm, "PHY is not turning OFF\n");
	}

	/* Wait for Pwr ACK bit to unset */
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),
					    GLK_MIPIIO_PORT_POWERED, 20))
			DRM_ERROR("MIPI IO Port is not powergated\n");
			drm_err(&dev_priv->drm,
				"MIPI IO Port is not powergated\n");
	}
}

@@ -567,7 +575,7 @@ static void glk_dsi_disable_mipi_io(struct intel_encoder *encoder)
	for_each_dsi_port(port, intel_dsi->ports) {
		if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port),
					    GLK_PHY_STATUS_PORT_READY, 20))
			DRM_ERROR("PHY is not turning OFF\n");
			drm_err(&dev_priv->drm, "PHY is not turning OFF\n");
	}

	/* Clear MIPI mode */
@@ -590,7 +598,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)
	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
	enum port port;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");
	for_each_dsi_port(port, intel_dsi->ports) {
		/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
		i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ?
@@ -616,7 +624,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)
		if ((IS_GEN9_LP(dev_priv) || port == PORT_A) &&
		    intel_de_wait_for_clear(dev_priv, port_ctrl,
					    AFE_LATCHOUT, 30))
			DRM_ERROR("DSI LP not going Low\n");
			drm_err(&dev_priv->drm, "DSI LP not going Low\n");

		/* Disable MIPI PHY transparent latch */
		val = intel_de_read(dev_priv, port_ctrl);
@@ -764,7 +772,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
	u32 val;
	bool glk_cold_boot = false;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

@@ -907,7 +915,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
	enum port port;
	u32 val;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	if (IS_GEN9_LP(dev_priv)) {
		intel_crtc_vblank_off(old_crtc_state);
@@ -982,7 +990,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
	enum port port;
	bool active = false;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	wakeref = intel_display_power_get_if_enabled(dev_priv,
						     encoder->power_domain);
@@ -1217,7 +1225,7 @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
{
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
	u32 pclk;
	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);

@@ -1351,7 +1359,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,
	u32 val, tmp;
	u16 mode_hdisplay;

	DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe));
	drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(intel_crtc->pipe));

	mode_hdisplay = adjusted_mode->crtc_hdisplay;

@@ -1727,7 +1735,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
	prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * mul);

	if (prepare_cnt > PREPARE_CNT_MAX) {
		DRM_DEBUG_KMS("prepare count too high %u\n", prepare_cnt);
		drm_dbg_kms(&dev_priv->drm, "prepare count too high %u\n",
			    prepare_cnt);
		prepare_cnt = PREPARE_CNT_MAX;
	}

@@ -1747,7 +1756,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
		exit_zero_cnt += 1;

	if (exit_zero_cnt > EXIT_ZERO_CNT_MAX) {
		DRM_DEBUG_KMS("exit zero count too high %u\n", exit_zero_cnt);
		drm_dbg_kms(&dev_priv->drm, "exit zero count too high %u\n",
			    exit_zero_cnt);
		exit_zero_cnt = EXIT_ZERO_CNT_MAX;
	}

@@ -1757,7 +1767,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
				* ui_den, ui_num * mul);

	if (clk_zero_cnt > CLK_ZERO_CNT_MAX) {
		DRM_DEBUG_KMS("clock zero count too high %u\n", clk_zero_cnt);
		drm_dbg_kms(&dev_priv->drm, "clock zero count too high %u\n",
			    clk_zero_cnt);
		clk_zero_cnt = CLK_ZERO_CNT_MAX;
	}

@@ -1766,7 +1777,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
	trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, ui_num * mul);

	if (trail_cnt > TRAIL_CNT_MAX) {
		DRM_DEBUG_KMS("trail count too high %u\n", trail_cnt);
		drm_dbg_kms(&dev_priv->drm, "trail count too high %u\n",
			    trail_cnt);
		trail_cnt = TRAIL_CNT_MAX;
	}

@@ -1841,7 +1853,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
	enum port port;
	enum pipe pipe;

	DRM_DEBUG_KMS("\n");
	drm_dbg_kms(&dev_priv->drm, "\n");

	/* There is no detection method for MIPI so rely on VBT */
	if (!intel_bios_is_dsi_present(dev_priv, &port))
@@ -1920,18 +1932,18 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
	}

	if (!intel_dsi_vbt_init(intel_dsi, MIPI_DSI_GENERIC_PANEL_ID)) {
		DRM_DEBUG_KMS("no device found\n");
		drm_dbg_kms(&dev_priv->drm, "no device found\n");
		goto err;
	}

	/* Use clock read-back from current hw-state for fastboot */
	current_mode = intel_encoder_current_mode(intel_encoder);
	if (current_mode) {
		DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n",
		drm_dbg_kms(&dev_priv->drm, "Calculated pclk %d GOP %d\n",
			    intel_dsi->pclk, current_mode->clock);
		if (intel_fuzzy_clock_check(intel_dsi->pclk,
					    current_mode->clock)) {
			DRM_DEBUG_KMS("Using GOP pclk\n");
			drm_dbg_kms(&dev_priv->drm, "Using GOP pclk\n");
			intel_dsi->pclk = current_mode->clock;
		}

@@ -1959,7 +1971,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
	mutex_unlock(&dev->mode_config.mutex);

	if (!fixed_mode) {
		DRM_DEBUG_KMS("no fixed mode\n");
		drm_dbg_kms(&dev_priv->drm, "no fixed mode\n");
		goto err_cleanup_connector;
	}