Commit f1883aa7 authored by Max Filippov's avatar Max Filippov
Browse files

xtensa: move kernel mapping addresses into kmem_layout.h 



Create a header dedicated to memory layout definitions. Include it from
places where these definitions are needed.
Express vmalloc area address, VIRTUAL_MEMORY_ADDRESS and KERNELOFFSET
through KSEG address.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 12c8007d

arch/xtensa/include/asm/kmem_layout.h

0 → 100644
+25 −0
Original line number Diff line number Diff line 
/*

 * Kernel virtual memory layout definitions.

 *

 * This file is subject to the terms and conditions of the GNU General

 * Public License.  See the file "COPYING" in the main directory of

 * this archive for more details.

 *

 * Copyright (C) 2016 Cadence Design Systems Inc.

 */



#ifndef _XTENSA_KMEM_LAYOUT_H

#define _XTENSA_KMEM_LAYOUT_H



#include <asm/types.h>



/*

 * Fixed TLB translations in the processor.

 */



#define XCHAL_KSEG_CACHED_VADDR	__XTENSA_UL_CONST(0xd0000000)

#define XCHAL_KSEG_BYPASS_VADDR	__XTENSA_UL_CONST(0xd8000000)

#define XCHAL_KSEG_SIZE		__XTENSA_UL_CONST(0x08000000)

#define XCHAL_KSEG_PADDR	__XTENSA_UL_CONST(0x00000000)



#endif

arch/xtensa/include/asm/page.h

+1 −9
Original line number Diff line number Diff line
@@ -15,15 +15,7 @@ 
#include <asm/types.h>

#include <asm/cache.h>

#include <platform/hardware.h>



/*

 * Fixed TLB translations in the processor.

 */



#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)

#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)

#define XCHAL_KSEG_PADDR        __XTENSA_UL_CONST(0x00000000)

#define XCHAL_KSEG_SIZE         __XTENSA_UL_CONST(0x08000000)

#include <asm/kmem_layout.h>



/*

 * PAGE_SHIFT determines the page size

arch/xtensa/include/asm/pgtable.h

+4 −3
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 


#include <asm-generic/pgtable-nopmd.h>

#include <asm/page.h>

#include <asm/kmem_layout.h>



/*

 * We only use two ring levels, user and kernel space.
@@ -68,9 +69,9 @@ 
 * Virtual memory area. We keep a distance to other memory regions to be

 * on the safe side. We also use this area for cache aliasing.

 */

#define VMALLOC_START		0xC0000000

#define VMALLOC_END		0xC7FEFFFF

#define TLBTEMP_BASE_1		0xC7FF0000

#define VMALLOC_START		(XCHAL_KSEG_CACHED_VADDR - 0x10000000)

#define VMALLOC_END		(VMALLOC_START + 0x07FEFFFF)

#define TLBTEMP_BASE_1		(VMALLOC_END + 1)

#define TLBTEMP_BASE_2		(TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)

#if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE

#define TLBTEMP_SIZE		(2 * DCACHE_WAY_SIZE)

arch/xtensa/include/asm/vectors.h

+3 −2
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 


#include <variant/core.h>

#include <platform/hardware.h>

#include <asm/kmem_layout.h>



#if XCHAL_HAVE_PTP_MMU

#define XCHAL_KIO_CACHED_VADDR		0xe0000000
@@ -48,10 +49,10 @@ static inline unsigned long xtensa_get_kio_paddr(void) 
#if defined(CONFIG_MMU)



/* Will Become VECBASE */

#define VIRTUAL_MEMORY_ADDRESS		0xD0000000

#define VIRTUAL_MEMORY_ADDRESS		XCHAL_KSEG_CACHED_VADDR



/* Image Virtual Start Address */

#define KERNELOFFSET			0xD0003000

#define KERNELOFFSET			(XCHAL_KSEG_CACHED_VADDR + 0x3000)



#if defined(XCHAL_HAVE_PTP_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY

  /* MMU v3  - XCHAL_HAVE_PTP_MMU  == 1 */

arch/xtensa/mm/init.c

+1 −1
Original line number Diff line number Diff line
@@ -344,7 +344,7 @@ void __init mem_init(void) 
		"    fixmap  : 0x%08lx - 0x%08lx  (%5lu kB)\n"

#endif

#ifdef CONFIG_MMU

		"    vmalloc : 0x%08x - 0x%08x  (%5u MB)\n"

		"    vmalloc : 0x%08lx - 0x%08lx  (%5lu MB)\n"

#endif

		"    lowmem  : 0x%08lx - 0x%08lx  (%5lu MB)\n",

#ifdef CONFIG_HIGHMEM

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