Commit f1741fda authored by Maxime Ripard's avatar Maxime Ripard
Browse files

ARM: sunxi: dt: Add i2c controller nodes to the DTSI 



The Allwinner A10 and A13 both have 3 i2c controller embedded.
Add those to the common sunxi dtsi.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: default avatarTomasz Figa <tomasz.figa@gmail.com>
parent 39138bc6

arch/arm/boot/dts/sun4i-a10.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -294,5 +294,32 @@ 
			clocks = <&apb1_gates 23>;

			status = "disabled";

		};



		i2c0: i2c@01c2ac00 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2ac00 0x400>;

			interrupts = <7>;

			clocks = <&apb1_gates 0>;

			clock-frequency = <100000>;

			status = "disabled";

		};



		i2c1: i2c@01c2b000 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2b000 0x400>;

			interrupts = <8>;

			clocks = <&apb1_gates 1>;

			clock-frequency = <100000>;

			status = "disabled";

		};



		i2c2: i2c@01c2b400 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2b400 0x400>;

			interrupts = <9>;

			clocks = <&apb1_gates 2>;

			clock-frequency = <100000>;

			status = "disabled";

		};

	};

};

arch/arm/boot/dts/sun5i-a13.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -217,5 +217,32 @@ 
			clocks = <&apb1_gates 19>;

			status = "disabled";

		};



		i2c0: i2c@01c2ac00 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2ac00 0x400>;

			interrupts = <7>;

			clocks = <&apb1_gates 0>;

			clock-frequency = <100000>;

			status = "disabled";

		};



		i2c1: i2c@01c2b000 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2b000 0x400>;

			interrupts = <8>;

			clocks = <&apb1_gates 1>;

			clock-frequency = <100000>;

			status = "disabled";

		};



		i2c2: i2c@01c2b400 {

			compatible = "allwinner,sun4i-i2c";

			reg = <0x01c2b400 0x400>;

			interrupts = <9>;

			clocks = <&apb1_gates 2>;

			clock-frequency = <100000>;

			status = "disabled";

		};

	};

};

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