Commit f15ac580 authored Jan 09, 2006 by Xu, Anthony Committed by Tony Luck Jan 16, 2006

[IA64] pal cache flush patch

Because PAL spec has changed since 2002, you can goto
http://developer.intel.com/design/itanium/manuals/iiasdmanual.htm

 to
download new SDM, all PAL calls should be invoked with psr.ic=1, and
it's caller's responsibility to handle possible tlb miss.
Ia64_pal_cache_flush was written according to old spec, it is obsolete,
and this patch has ia64_pal_cache_flush conform to new spec.

Signed-off-by Anthony Xu <anthony.xu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

parent 7b9c8ba2

include/asm-ia64/pal.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -927,7 +927,7 @@ static inline s64
		ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 progress, u64 vector)
		{
		struct ia64_pal_retval iprv;
		PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
		PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
		if (vector)
		*vector = iprv.v0;
		*progress = iprv.v1;

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