Commit f129230b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'sunxi-fixes-for-5.4-3' of... 

Merge tag 'sunxi-fixes-for-5.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

One patch to add back the PMU node that was removed because the
interrupts were improper in a previous fixes PR.

* tag 'sunxi-fixes-for-5.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: a64: Re-add PMU node
  ARM: sunxi: Fix CPU powerdown on A83T
  ARM: dts: sun8i-a83t-tbs-a711: Fix WiFi resume from suspend
  ARM: dts: sun7i: Drop the module clock from the device tree
  dt-bindings: media: sun4i-csi: Drop the module clock
  media: dt-bindings: Fix building error for dt_binding_check
  arm64: dts: allwinner: a64: sopine-baseboard: Add PHY regulator delay
  arm64: dts: allwinner: a64: Drop PMU node
  arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay

Link: https://lore.kernel.org/r/45023fa6-b2bc-4934-b85c-3e7841dde0b1.lettre@localhost


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e315c7b3 6b832a14

Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml

+3 −6
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml#

$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
@@ -27,14 +27,12 @@ properties: 
  clocks:

    items:

      - description: The CSI interface clock

      - description: The CSI module clock

      - description: The CSI ISP clock

      - description: The CSI DRAM clock



  clock-names:

    items:

      - const: bus

      - const: mod

      - const: isp

      - const: ram
@@ -89,9 +87,8 @@ examples: 
        compatible = "allwinner,sun7i-a20-csi0";

        reg = <0x01c09000 0x1000>;

        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,

                 <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;

        clock-names = "bus", "mod", "isp", "ram";

        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;

        clock-names = "bus", "isp", "ram";

        resets = <&ccu RST_CSI0>;



        port {

arch/arm/boot/dts/sun7i-a20.dtsi

+2 −3
Original line number Diff line number Diff line
@@ -380,9 +380,8 @@ 
			compatible = "allwinner,sun7i-a20-csi0";

			reg = <0x01c09000 0x1000>;

			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,

				 <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;

			clock-names = "bus", "mod", "isp", "ram";

			clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;

			clock-names = "bus", "isp", "ram";

			resets = <&ccu RST_CSI0>;

			status = "disabled";

		};

arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts

+1 −0
Original line number Diff line number Diff line
@@ -208,6 +208,7 @@ 
	vqmmc-supply = <&reg_dldo1>;

	non-removable;

	wakeup-source;

	keep-power-in-suspend;

	status = "okay";



	brcmf: wifi@1 {

arch/arm/mach-sunxi/mc_smp.c

+5 −1
Original line number Diff line number Diff line
@@ -481,14 +481,18 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu) 
static int sunxi_cpu_powerdown(unsigned int cpu, unsigned int cluster)

{

	u32 reg;

	int gating_bit = cpu;



	pr_debug("%s: cluster %u cpu %u\n", __func__, cluster, cpu);

	if (cpu >= SUNXI_CPUS_PER_CLUSTER || cluster >= SUNXI_NR_CLUSTERS)

		return -EINVAL;



	if (is_a83t && cpu == 0)

		gating_bit = 4;



	/* gate processor power */

	reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));

	reg |= PRCM_PWROFF_GATING_REG_CORE(cpu);

	reg |= PRCM_PWROFF_GATING_REG_CORE(gating_bit);

	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));

	udelay(20);

arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts

+9 −0
Original line number Diff line number Diff line
@@ -63,3 +63,12 @@ 
		reg = <1>;

	};

};



&reg_dc1sw {

	/*

	 * Ethernet PHY needs 30ms to properly power up and some more

	 * to initialize. 100ms should be plenty of time to finish

	 * whole process.

	 */

	regulator-enable-ramp-delay = <100000>;

};

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