Commit f11fbaf8 authored Oct 22, 2017 by Ido Schimmel Committed by David S. Miller Oct 23, 2017

mlxsw: spectrum: Increase number of linear entries



The memory region where adjacency entries (nexthops) are stored is
called the KVD linear and is configured during initialization with a
size of 64K.

Extend this area with 32K more entries, that will be partitioned into 64
groups of 0.5K entries, thereby allowing us to support weighted nexthops
with high accuracy.

Change the ratio between both types of hash entries, so as to prevent
reduction in the number of double hash entries, which are used for IPv6
neighbours and routes with a prefix length greater than 64.

Note that the user will be able to control all these sizes once the
devlink resource manager is introduced.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent eb789980

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -3885,8 +3885,8 @@ static const struct mlxsw_config_profile mlxsw_sp_config_profile = {
		.max_pkey = 0,
		.used_kvd_split_data = 1,
		.kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
		.kvd_hash_single_parts = 2,
		.kvd_hash_double_parts = 1,
		.kvd_hash_single_parts = 59,
		.kvd_hash_double_parts = 41,
		.kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
		.swid_config = {
		{

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -62,7 +62,7 @@

		#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */

		#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
		#define MLXSW_SP_KVD_LINEAR_SIZE 98304 /* entries */
		#define MLXSW_SP_KVD_GRANULARITY 128

		struct mlxsw_sp_port;

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