Commit f0f6e375 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: delete SMUM_READ_VFPF_INDIRECT_FIELD 



repeated defining in hwmgr.h

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 37192704

drivers/gpu/drm/amd/powerplay/inc/smumgr.h

+0 −5
Original line number Diff line number Diff line
@@ -179,10 +179,5 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); 
	    SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \

			   reg, field)



/*Operations on named fields.*/



#define SMUM_READ_VFPF_INDIRECT_FIELD(device, port, reg, field) \

		SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \

			reg, field)



#endif

drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c

+1 −1
Original line number Diff line number Diff line
@@ -188,7 +188,7 @@ static int ci_program_jump_on_start(struct pp_hwmgr *hwmgr) 


bool ci_is_smc_ram_running(struct pp_hwmgr *hwmgr)

{

	return ((0 == SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,

	return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,

			CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))

	&& (0x20100 <= cgs_read_ind_register(hwmgr->device,

			CGS_IND_REG__SMC, ixSMC_PC_C)));

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+2 −2
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) 
			SMU_STATUS, SMU_DONE, 0);



	/* Check pass/failed indicator */

	if (SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

	if (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

			SMU_STATUS, SMU_PASS) != 1) {

		PP_ASSERT_WITH_CODE(false,

				"SMU Firmware start failed!", return -1);
@@ -304,7 +304,7 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr) 
		fiji_avfs_event_mgr(hwmgr, false);



		/* Check if SMU is running in protected mode */

		if (0 == SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,

		if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,

				CGS_IND_REG__SMC,

				SMU_FIRMWARE, SMU_MODE)) {

			result = fiji_start_smu_in_non_protection_mode(hwmgr);

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

+3 −3
Original line number Diff line number Diff line
@@ -252,7 +252,7 @@ static int polaris10_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) 


	PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, SMU_STATUS, SMU_DONE, 0);



	if (1 != SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

	if (1 != PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

						SMU_STATUS, SMU_PASS))

		PP_ASSERT_WITH_CODE(false, "SMU Firmware start failed!", return -1);
@@ -316,8 +316,8 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr) 
	/* Only start SMC if SMC RAM is not running */

	if (!smu7_is_smc_ram_running(hwmgr)) {

		SMU_VFT_INTACT = false;

		smu_data->protected_mode = (uint8_t) (SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));

		smu_data->smu7_data.security_hard_key = (uint8_t) (SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));

		smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));

		smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));



		/* Check if SMU is running in protected mode */

		if (smu_data->protected_mode == 0) {

drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ int smu7_program_jump_on_start(struct pp_hwmgr *hwmgr) 


bool smu7_is_smc_ram_running(struct pp_hwmgr *hwmgr)

{

	return ((0 == SMUM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))

	return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))

	&& (0x20100 <= cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMC_PC_C)));

}

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