MIPS: jz4740: Consolidate chained IRQ handler install/remove (f058dc80) · Commits · 戴 / test

Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by:

Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by:

Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: linux-mips@linux-mips.org Cc: LKML <linux-kernel@vger.kernel.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Patchwork: https://patchwork.linux-mips.org/patch/10695/ Signed-off-by:

Ralf Baechle <ralf@linux-mips.org>

arch/mips/jz4740/gpio.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -423,8 +423,8 @@ static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
	chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100);		chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100);

	chip->irq = JZ4740_IRQ_INTC_GPIO(id);		chip->irq = JZ4740_IRQ_INTC_GPIO(id);
	irq_set_handler_data(chip->irq, chip);		irq_set_chained_handler_and_data(chip->irq,
	irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler);		jz_gpio_irq_demux_handler, chip);

	gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base,		gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base,
	chip->base, handle_level_irq);		chip->base, handle_level_irq);

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