spi: dw-mid: take care of FIFO overrun/underrun when do DMA (f051fc8f) · Commits · 戴 / test

In according to documentation SPI in DMA mode may encounter underrun/overrun failures in rare cases. When such failure occurs, an error recovery protocol is expected to be implemented in the device driver so that the failed transaction can be restarted. This patch enables FIFO overrun / underrun interrupts in DMA case and adds a handler for that. Signed-off-by:

Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:

Mark Brown <broonie@kernel.org>

drivers/spi/spi-dw-mid.c

+21 −0

Original line number	Diff line number	Diff line
		@@ -100,6 +100,22 @@ static void mid_spi_dma_exit(struct dw_spi *dws)
		dma_release_channel(dws->rxchan);
		}

		static irqreturn_t dma_transfer(struct dw_spi *dws)
		{
		u16 irq_status = dw_readw(dws, DW_SPI_ISR);

		if (!irq_status)
		return IRQ_NONE;

		dw_readw(dws, DW_SPI_ICR);
		spi_reset_chip(dws);

		dev_err(&dws->master->dev, "%s: FIFO overrun/underrun\n", __func__);
		dws->master->cur_msg->status = -EIO;
		spi_finalize_current_transfer(dws->master);
		return IRQ_HANDLED;
		}

		static enum dma_slave_buswidth convert_dma_width(u32 dma_width) {
		if (dma_width == 1)
		return DMA_SLAVE_BUSWIDTH_1_BYTE;
		@@ -220,6 +236,11 @@ static int mid_spi_dma_setup(struct dw_spi *dws)
		dma_ctrl \|= SPI_DMA_RDMAE;
		dw_writew(dws, DW_SPI_DMACR, dma_ctrl);

		/* Set the interrupt mask */
		spi_umask_intr(dws, SPI_INT_TXOI \| SPI_INT_RXUI \| SPI_INT_RXOI);

		dws->transfer_handler = dma_transfer;

		return 0;
		}

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