Commit efd30437 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'amd-drm-fixes-5.11-2020-12-16' of... 

Merge tag 'amd-drm-fixes-5.11-2020-12-16' of git://people.freedesktop.org/~agd5f/linux

 into drm-next

amd-drm-fixes-5.11-2020-12-16:

amdgpu:
- Fix a eDP regression for DCE asics
- SMU fixes for sienna cichlid
- Misc W=1 fixes
- SDMA 5.2 reset fix
- Suspend/resume fix
- Misc display fixes
- Misc runtime PM fixes and cleanups
- Dimgrey Cavefish fixes
- printk cleanup
- Documentation warning fixes

amdkfd:
- Error logging fix
- Fix pipe offset calculation

radeon:
- printk cleanup

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201216192421.18627-1-alexander.deucher@amd.com
parents 02e66dd5 6ae09fa4

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+4 −2
Original line number Diff line number Diff line
@@ -1024,6 +1024,7 @@ struct amdgpu_device { 
	/* enable runtime pm on the device */

	bool                            runpm;

	bool                            in_runpm;

	bool                            has_pr3;



	bool                            pm_sysfs_en;

	bool                            ucode_sysfs_en;
@@ -1230,6 +1231,7 @@ void amdgpu_device_program_register_sequence(struct amdgpu_device *adev, 
					     const u32 *registers,

					     const u32 array_size);



bool amdgpu_device_supports_atpx(struct drm_device *dev);

bool amdgpu_device_supports_boco(struct drm_device *dev);

bool amdgpu_device_supports_baco(struct drm_device *dev);

bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
@@ -1313,11 +1315,11 @@ int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev); 


void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev,

		struct amdgpu_dm_backlight_caps *caps);

bool amdgpu_acpi_is_s0ix_supported(void);

bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev);

#else

static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }

static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }

static inline bool amdgpu_acpi_is_s0ix_supported(void) { return false; }

static inline bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) { return false; }

#endif



int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+5 −3
Original line number Diff line number Diff line
@@ -901,10 +901,12 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev) 
 *

 * returns true if supported, false if not.

 */

bool amdgpu_acpi_is_s0ix_supported(void)

bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev)

{

	if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)

	if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) {

		if (adev->flags & AMD_IS_APU)

			return true;

	}



	return false;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+1 −1
Original line number Diff line number Diff line
@@ -1213,7 +1213,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 


	ret = amdgpu_amdkfd_reserve_mem_limit(adev, size, alloc_domain, !!sg);

	if (ret) {

		pr_debug("Insufficient system memory\n");

		pr_debug("Insufficient memory\n");

		goto err_reserve_limit;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+30 −13
Original line number Diff line number Diff line
@@ -212,14 +212,14 @@ static DEVICE_ATTR(serial_number, S_IRUGO, 
		amdgpu_device_get_serial_number, NULL);



/**

 * amdgpu_device_supports_boco - Is the device a dGPU with HG/PX power control

 * amdgpu_device_supports_atpx - Is the device a dGPU with HG/PX power control

 *

 * @dev: drm_device pointer

 *

 * Returns true if the device is a dGPU with HG/PX power control,

 * otherwise return false.

 */

bool amdgpu_device_supports_boco(struct drm_device *dev)

bool amdgpu_device_supports_atpx(struct drm_device *dev)

{

	struct amdgpu_device *adev = drm_to_adev(dev);
@@ -228,6 +228,23 @@ bool amdgpu_device_supports_boco(struct drm_device *dev) 
	return false;

}



/**

 * amdgpu_device_supports_boco - Is the device a dGPU with ACPI power resources

 *

 * @dev: drm_device pointer

 *

 * Returns true if the device is a dGPU with HG/PX power control,

 * otherwise return false.

 */

bool amdgpu_device_supports_boco(struct drm_device *dev)

{

	struct amdgpu_device *adev = drm_to_adev(dev);



	if (adev->has_pr3)

		return true;

	return false;

}



/**

 * amdgpu_device_supports_baco - Does the device support BACO

 *
@@ -1398,7 +1415,7 @@ static void amdgpu_switcheroo_set_state(struct pci_dev *pdev, 
	struct drm_device *dev = pci_get_drvdata(pdev);

	int r;



	if (amdgpu_device_supports_boco(dev) && state == VGA_SWITCHEROO_OFF)

	if (amdgpu_device_supports_atpx(dev) && state == VGA_SWITCHEROO_OFF)

		return;



	if (state == VGA_SWITCHEROO_ON) {
@@ -2650,7 +2667,7 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) 
{

	int i, r;



	if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev)) {

	if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {

		amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);

		amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);

	}
@@ -3177,7 +3194,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	struct drm_device *ddev = adev_to_drm(adev);

	struct pci_dev *pdev = adev->pdev;

	int r, i;

	bool boco = false;

	bool atpx = false;

	u32 max_MBps;



	adev->shutdown = false;
@@ -3349,15 +3366,15 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	if ((adev->pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)

		vga_client_register(adev->pdev, adev, NULL, amdgpu_device_vga_set_decode);



	if (amdgpu_device_supports_boco(ddev))

		boco = true;

	if (amdgpu_device_supports_atpx(ddev))

		atpx = true;

	if (amdgpu_has_atpx() &&

	    (amdgpu_is_atpx_hybrid() ||

	     amdgpu_has_atpx_dgpu_power_cntl()) &&

	    !pci_is_thunderbolt_attached(adev->pdev))

		vga_switcheroo_register_client(adev->pdev,

					       &amdgpu_switcheroo_ops, boco);

	if (boco)

					       &amdgpu_switcheroo_ops, atpx);

	if (atpx)

		vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain);



	if (amdgpu_emu_mode == 1) {
@@ -3540,7 +3557,7 @@ fence_driver_init: 


failed:

	amdgpu_vf_error_trans_all(adev);

	if (boco)

	if (atpx)

		vga_switcheroo_fini_domain_pm_ops(adev->dev);



failed_unmap:
@@ -3604,7 +3621,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev) 
	     amdgpu_has_atpx_dgpu_power_cntl()) &&

	    !pci_is_thunderbolt_attached(adev->pdev))

		vga_switcheroo_unregister_client(adev->pdev);

	if (amdgpu_device_supports_boco(adev_to_drm(adev)))

	if (amdgpu_device_supports_atpx(adev_to_drm(adev)))

		vga_switcheroo_fini_domain_pm_ops(adev->dev);

	if ((adev->pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)

		vga_client_register(adev->pdev, NULL, NULL, NULL);
@@ -3710,7 +3727,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) 


	amdgpu_fence_driver_suspend(adev);



	if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev))

	if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))

		r = amdgpu_device_ip_suspend_phase2(adev);

	else

		amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry);
@@ -3744,7 +3761,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) 
	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)

		return 0;



	if (amdgpu_acpi_is_s0ix_supported())

	if (amdgpu_acpi_is_s0ix_supported(adev))

		amdgpu_gfx_state_change_set(adev, sGpuChangeState_D0Entry);



	/* post card */

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+12 −11
Original line number Diff line number Diff line
@@ -1340,7 +1340,7 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	}



	adev->in_runpm = true;

	if (amdgpu_device_supports_boco(drm_dev))

	if (amdgpu_device_supports_atpx(drm_dev))

		drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;

	drm_kms_helper_poll_disable(drm_dev);
@@ -1348,13 +1348,11 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	if (ret)

		return ret;



	if (amdgpu_device_supports_boco(drm_dev)) {

	if (amdgpu_device_supports_atpx(drm_dev)) {

		/* Only need to handle PCI state in the driver for ATPX

		 * PCI core handles it for _PR3.

		 */

		if (amdgpu_is_atpx_hybrid()) {

			pci_ignore_hotplug(pdev);

		} else {

		if (!amdgpu_is_atpx_hybrid()) {

			amdgpu_device_cache_pci_state(pdev);

			pci_disable_device(pdev);

			pci_ignore_hotplug(pdev);
@@ -1378,28 +1376,31 @@ static int amdgpu_pmops_runtime_resume(struct device *dev) 
	if (!adev->runpm)

		return -EINVAL;



	if (amdgpu_device_supports_boco(drm_dev)) {

	if (amdgpu_device_supports_atpx(drm_dev)) {

		drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;



		/* Only need to handle PCI state in the driver for ATPX

		 * PCI core handles it for _PR3.

		 */

		if (amdgpu_is_atpx_hybrid()) {

			pci_set_master(pdev);

		} else {

		if (!amdgpu_is_atpx_hybrid()) {

			pci_set_power_state(pdev, PCI_D0);

			amdgpu_device_load_pci_state(pdev);

			ret = pci_enable_device(pdev);

			if (ret)

				return ret;

			pci_set_master(pdev);

		}

		pci_set_master(pdev);

	} else if (amdgpu_device_supports_boco(drm_dev)) {

		/* Only need to handle PCI state in the driver for ATPX

		 * PCI core handles it for _PR3.

		 */

		pci_set_master(pdev);

	} else if (amdgpu_device_supports_baco(drm_dev)) {

		amdgpu_device_baco_exit(drm_dev);

	}

	ret = amdgpu_device_resume(drm_dev, false);

	drm_kms_helper_poll_enable(drm_dev);

	if (amdgpu_device_supports_boco(drm_dev))

	if (amdgpu_device_supports_atpx(drm_dev))

		drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;

	adev->in_runpm = false;

	return 0;

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