Commit efc2e0bd authored by Otavio Salvador's avatar Otavio Salvador Committed by Heiko Stuebner
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ARM: dts: rockchip: Assign the proper GPIO clocks for rv1108 



It is not correct to assign the 24MHz clock oscillator to the GPIO
ports.

Fix it by assigning the proper GPIO clocks instead.

Signed-off-by: default avatarOtavio Salvador <otavio@ossystems.com.br>
Tested-by: default avatarFabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c955b7ae

arch/arm/boot/dts/rv1108.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -565,7 +565,7 @@ 
			compatible = "rockchip,gpio-bank";

			reg = <0x20030000 0x100>;

			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&xin24m>;

			clocks = <&cru PCLK_GPIO0_PMU>;



			gpio-controller;

			#gpio-cells = <2>;
@@ -578,7 +578,7 @@ 
			compatible = "rockchip,gpio-bank";

			reg = <0x10310000 0x100>;

			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&xin24m>;

			clocks = <&cru PCLK_GPIO1>;



			gpio-controller;

			#gpio-cells = <2>;
@@ -591,7 +591,7 @@ 
			compatible = "rockchip,gpio-bank";

			reg = <0x10320000 0x100>;

			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&xin24m>;

			clocks = <&cru PCLK_GPIO2>;



			gpio-controller;

			#gpio-cells = <2>;
@@ -604,7 +604,7 @@ 
			compatible = "rockchip,gpio-bank";

			reg = <0x10330000 0x100>;

			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&xin24m>;

			clocks = <&cru PCLK_GPIO3>;



			gpio-controller;

			#gpio-cells = <2>;

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