net/mlx5e: Add HW timestamping (TS) support (ef9814de) · Commits · 戴 / test

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -5,4 +5,4 @@ mlx5_core-y := main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \
		mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o
		mlx5_core-$(CONFIG_MLX5_CORE_EN) += wq.o eswitch.o \
		en_main.o en_fs.o en_ethtool.o en_tx.o en_rx.o \
		en_txrx.o
		en_txrx.o en_clock.o

drivers/net/ethernet/mellanox/mlx5/core/en.h

+23 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,8 @@

		#include <linux/if_vlan.h>
		#include <linux/etherdevice.h>
		#include <linux/timecounter.h>
		#include <linux/net_tstamp.h>
		#include <linux/mlx5/driver.h>
		#include <linux/mlx5/qp.h>
		#include <linux/mlx5/cq.h>
		@@ -284,6 +286,17 @@ struct mlx5e_params {
		u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];
		};

		struct mlx5e_tstamp {
		rwlock_t lock;
		struct cyclecounter cycles;
		struct timecounter clock;
		struct hwtstamp_config hwtstamp_config;
		u32 nominal_c_mult;
		unsigned long overflow_period;
		struct delayed_work overflow_work;
		struct mlx5_core_dev *mdev;
		};

		enum {
		MLX5E_RQ_STATE_POST_WQES_ENABLE,
		};
		@@ -315,6 +328,7 @@ struct mlx5e_rq {

		struct device *pdev;
		struct net_device *netdev;
		struct mlx5e_tstamp *tstamp;
		struct mlx5e_rq_stats stats;
		struct mlx5e_cq cq;

		@@ -382,6 +396,7 @@ struct mlx5e_sq {
		u16 max_inline;
		u16 edge;
		struct device *pdev;
		struct mlx5e_tstamp *tstamp;
		__be32 mkey_be;
		unsigned long state;

		@@ -518,6 +533,7 @@ struct mlx5e_priv {
		struct mlx5_core_dev *mdev;
		struct net_device *netdev;
		struct mlx5e_stats stats;
		struct mlx5e_tstamp tstamp;
		};

		#define MLX5E_NET_IP_ALIGN 2
		@@ -584,6 +600,13 @@ void mlx5e_destroy_flow_tables(struct mlx5e_priv *priv);
		void mlx5e_init_eth_addr(struct mlx5e_priv *priv);
		void mlx5e_set_rx_mode_work(struct work_struct *work);

		void mlx5e_fill_hwstamp(struct mlx5e_tstamp *clock, u64 timestamp,
		struct skb_shared_hwtstamps *hwts);
		void mlx5e_timestamp_init(struct mlx5e_priv *priv);
		void mlx5e_timestamp_cleanup(struct mlx5e_priv *priv);
		int mlx5e_hwstamp_set(struct net_device dev, struct ifreq ifr);
		int mlx5e_hwstamp_get(struct net_device dev, struct ifreq ifr);

		int mlx5e_vlan_rx_add_vid(struct net_device *dev, __always_unused __be16 proto,
		u16 vid);
		int mlx5e_vlan_rx_kill_vid(struct net_device *dev, __always_unused __be16 proto,

drivers/net/ethernet/mellanox/mlx5/core/en_clock.c

0 → 100644

+187 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2015, Mellanox Technologies. All rights reserved.
		*
		* This software is available to you under a choice of one of two
		* licenses. You may choose to be licensed under the terms of the GNU
		* General Public License (GPL) Version 2, available from the file
		* COPYING in the main directory of this source tree, or the
		* OpenIB.org BSD license below:
		*
		* Redistribution and use in source and binary forms, with or
		* without modification, are permitted provided that the following
		* conditions are met:
		*
		* - Redistributions of source code must retain the above
		* copyright notice, this list of conditions and the following
		* disclaimer.
		*
		* - Redistributions in binary form must reproduce the above
		* copyright notice, this list of conditions and the following
		* disclaimer in the documentation and/or other materials
		* provided with the distribution.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
		* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
		* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
		* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
		* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		* SOFTWARE.
		*/

		#include <linux/clocksource.h>
		#include "en.h"

		enum {
		MLX5E_CYCLES_SHIFT = 23
		};

		void mlx5e_fill_hwstamp(struct mlx5e_tstamp *tstamp, u64 timestamp,
		struct skb_shared_hwtstamps *hwts)
		{
		u64 nsec;

		read_lock(&tstamp->lock);
		nsec = timecounter_cyc2time(&tstamp->clock, timestamp);
		read_unlock(&tstamp->lock);

		hwts->hwtstamp = ns_to_ktime(nsec);
		}

		static cycle_t mlx5e_read_internal_timer(const struct cyclecounter *cc)
		{
		struct mlx5e_tstamp *tstamp = container_of(cc, struct mlx5e_tstamp,
		cycles);

		return mlx5_read_internal_timer(tstamp->mdev) & cc->mask;
		}

		static void mlx5e_timestamp_overflow(struct work_struct *work)
		{
		struct delayed_work *dwork = to_delayed_work(work);
		struct mlx5e_tstamp *tstamp = container_of(dwork, struct mlx5e_tstamp,
		overflow_work);

		write_lock(&tstamp->lock);
		timecounter_read(&tstamp->clock);
		write_unlock(&tstamp->lock);
		schedule_delayed_work(&tstamp->overflow_work, tstamp->overflow_period);
		}

		int mlx5e_hwstamp_set(struct net_device dev, struct ifreq ifr)
		{
		struct mlx5e_priv *priv = netdev_priv(dev);
		struct hwtstamp_config config;

		if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
		return -EOPNOTSUPP;

		if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
		return -EFAULT;

		/* TX HW timestamp */
		switch (config.tx_type) {
		case HWTSTAMP_TX_OFF:
		case HWTSTAMP_TX_ON:
		break;
		default:
		return -ERANGE;
		}

		/* RX HW timestamp */
		switch (config.rx_filter) {
		case HWTSTAMP_FILTER_NONE:
		break;
		case HWTSTAMP_FILTER_ALL:
		case HWTSTAMP_FILTER_SOME:
		case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
		case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
		case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
		case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
		case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
		case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
		case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
		case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
		case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
		case HWTSTAMP_FILTER_PTP_V2_EVENT:
		case HWTSTAMP_FILTER_PTP_V2_SYNC:
		case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
		config.rx_filter = HWTSTAMP_FILTER_ALL;
		break;
		default:
		return -ERANGE;
		}

		memcpy(&priv->tstamp.hwtstamp_config, &config, sizeof(config));

		return copy_to_user(ifr->ifr_data, &config,
		sizeof(config)) ? -EFAULT : 0;
		}

		int mlx5e_hwstamp_get(struct net_device dev, struct ifreq ifr)
		{
		struct mlx5e_priv *priv = netdev_priv(dev);
		struct hwtstamp_config *cfg = &priv->tstamp.hwtstamp_config;

		if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
		return -EOPNOTSUPP;

		return copy_to_user(ifr->ifr_data, cfg, sizeof(*cfg)) ? -EFAULT : 0;
		}

		static void mlx5e_timestamp_init_config(struct mlx5e_tstamp *tstamp)
		{
		tstamp->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
		tstamp->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
		}

		void mlx5e_timestamp_init(struct mlx5e_priv *priv)
		{
		struct mlx5e_tstamp *tstamp = &priv->tstamp;
		u64 ns;
		u64 frac = 0;
		u32 dev_freq;

		mlx5e_timestamp_init_config(tstamp);
		dev_freq = MLX5_CAP_GEN(priv->mdev, device_frequency_khz);
		if (!dev_freq) {
		mlx5_core_warn(priv->mdev, "invalid device_frequency_khz, aborting HW clock init\n");
		return;
		}
		rwlock_init(&tstamp->lock);
		tstamp->cycles.read = mlx5e_read_internal_timer;
		tstamp->cycles.shift = MLX5E_CYCLES_SHIFT;
		tstamp->cycles.mult = clocksource_khz2mult(dev_freq,
		tstamp->cycles.shift);
		tstamp->nominal_c_mult = tstamp->cycles.mult;
		tstamp->cycles.mask = CLOCKSOURCE_MASK(41);
		tstamp->mdev = priv->mdev;

		timecounter_init(&tstamp->clock, &tstamp->cycles,
		ktime_to_ns(ktime_get_real()));

		/* Calculate period in seconds to call the overflow watchdog - to make
		* sure counter is checked at least once every wrap around.
		*/
		ns = cyclecounter_cyc2ns(&tstamp->cycles, tstamp->cycles.mask,
		frac, &frac);
		do_div(ns, NSEC_PER_SEC / 2 / HZ);
		tstamp->overflow_period = ns;

		INIT_DELAYED_WORK(&tstamp->overflow_work, mlx5e_timestamp_overflow);
		if (tstamp->overflow_period)
		schedule_delayed_work(&tstamp->overflow_work, 0);
		else
		mlx5_core_warn(priv->mdev, "invalid overflow period, overflow_work is not scheduled\n");
		}

		void mlx5e_timestamp_cleanup(struct mlx5e_priv *priv)
		{
		struct mlx5e_tstamp *tstamp = &priv->tstamp;

		if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
		return;

		cancel_delayed_work_sync(&tstamp->overflow_work);
		}

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+29 −0

Original line number	Diff line number	Diff line
		@@ -855,6 +855,34 @@ static int mlx5e_set_pauseparam(struct net_device *netdev,
		return err;
		}

		static int mlx5e_get_ts_info(struct net_device *dev,
		struct ethtool_ts_info *info)
		{
		struct mlx5e_priv *priv = netdev_priv(dev);
		int ret;

		ret = ethtool_op_get_ts_info(dev, info);
		if (ret)
		return ret;

		info->phc_index = -1;

		if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
		return 0;

		info->so_timestamping \|= SOF_TIMESTAMPING_TX_HARDWARE \|
		SOF_TIMESTAMPING_RX_HARDWARE \|
		SOF_TIMESTAMPING_RAW_HARDWARE;

		info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) \|
		(BIT(1) << HWTSTAMP_TX_ON);

		info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) \|
		(BIT(1) << HWTSTAMP_FILTER_ALL);

		return 0;
		}

		const struct ethtool_ops mlx5e_ethtool_ops = {
		.get_drvinfo = mlx5e_get_drvinfo,
		.get_link = ethtool_op_get_link,
		@@ -878,4 +906,5 @@ const struct ethtool_ops mlx5e_ethtool_ops = {
		.set_tunable = mlx5e_set_tunable,
		.get_pauseparam = mlx5e_get_pauseparam,
		.set_pauseparam = mlx5e_set_pauseparam,
		.get_ts_info = mlx5e_get_ts_info,
		};

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+18 −1

Original line number	Diff line number	Diff line
		@@ -351,6 +351,7 @@ static int mlx5e_create_rq(struct mlx5e_channel *c,

		rq->pdev = c->pdev;
		rq->netdev = c->netdev;
		rq->tstamp = &priv->tstamp;
		rq->channel = c;
		rq->ix = c->ix;
		rq->priv = c->priv;
		@@ -571,6 +572,7 @@ static int mlx5e_create_sq(struct mlx5e_channel *c,
		sq->txq = netdev_get_tx_queue(priv->netdev, txq_ix);

		sq->pdev = c->pdev;
		sq->tstamp = &priv->tstamp;
		sq->mkey_be = c->mkey_be;
		sq->channel = c;
		sq->tc = tc;
		@@ -1430,6 +1432,7 @@ int mlx5e_open_locked(struct net_device *netdev)

		mlx5e_update_carrier(priv);
		mlx5e_redirect_rqts(priv);
		mlx5e_timestamp_init(priv);

		schedule_delayed_work(&priv->update_stats_work, 0);

		@@ -1466,6 +1469,7 @@ int mlx5e_close_locked(struct net_device *netdev)

		clear_bit(MLX5E_STATE_OPENED, &priv->state);

		mlx5e_timestamp_cleanup(priv);
		mlx5e_redirect_rqts(priv);
		netif_carrier_off(priv->netdev);
		mlx5e_close_channels(priv);
		@@ -1935,6 +1939,18 @@ static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)
		return err;
		}

		static int mlx5e_ioctl(struct net_device dev, struct ifreq ifr, int cmd)
		{
		switch (cmd) {
		case SIOCSHWTSTAMP:
		return mlx5e_hwstamp_set(dev, ifr);
		case SIOCGHWTSTAMP:
		return mlx5e_hwstamp_get(dev, ifr);
		default:
		return -EOPNOTSUPP;
		}
		}

		static int mlx5e_set_vf_mac(struct net_device dev, int vf, u8 mac)
		{
		struct mlx5e_priv *priv = netdev_priv(dev);
		@@ -2018,7 +2034,8 @@ static struct net_device_ops mlx5e_netdev_ops = {
		.ndo_vlan_rx_add_vid = mlx5e_vlan_rx_add_vid,
		.ndo_vlan_rx_kill_vid = mlx5e_vlan_rx_kill_vid,
		.ndo_set_features = mlx5e_set_features,
		.ndo_change_mtu = mlx5e_change_mtu
		.ndo_change_mtu = mlx5e_change_mtu,
		.ndo_do_ioctl = mlx5e_ioctl,
		};

		static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)

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