Commit ef2f826c authored by Huacai Chen's avatar Huacai Chen Committed by Ralf Baechle
Browse files

MIPS: Loongson-3: Enable the COP2 usage 



Loongson-3 has some specific instructions (MMI/SIMD) in coprocessor 2.
COP2 isn't independent because it share COP1 (FPU)'s registers. This
patch enable the COP2 usage so user-space programs can use the MMI/SIMD
instructions. When COP2 exception happens, we enable both COP1 (FPU)
and COP2, only in this way the fp context can be saved and restored
correctly.

Signed-off-by: default avatarHuacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7189/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e7841be5

arch/mips/include/asm/cop2.h

+8 −0
Original line number Diff line number Diff line
@@ -32,6 +32,14 @@ extern void nlm_cop2_restore(struct nlm_cop2_state *); 
#define cop2_present		1

#define cop2_lazy_restore	0



#elif defined(CONFIG_CPU_LOONGSON3)



#define cop2_save(r)

#define cop2_restore(r)



#define cop2_present		1

#define cop2_lazy_restore	1



#else



#define cop2_present		0

arch/mips/loongson/loongson-3/Makefile

+1 −1
Original line number Diff line number Diff line 
#

# Makefile for Loongson-3 family machines

#

obj-y			+= irq.o

obj-y			+= irq.o cop2-ex.o



obj-$(CONFIG_SMP)	+= smp.o

arch/mips/loongson/loongson-3/cop2-ex.c

0 → 100644
+63 −0
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2014 Lemote Corporation.

 *   written by Huacai Chen <chenhc@lemote.com>

 *

 * based on arch/mips/cavium-octeon/cpu.c

 * Copyright (C) 2009 Wind River Systems,

 *   written by Ralf Baechle <ralf@linux-mips.org>

 */

#include <linux/init.h>

#include <linux/sched.h>

#include <linux/notifier.h>



#include <asm/fpu.h>

#include <asm/cop2.h>

#include <asm/current.h>

#include <asm/mipsregs.h>



static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,

	void *data)

{

	int fpu_enabled;

	int fr = !test_thread_flag(TIF_32BIT_FPREGS);



	switch (action) {

	case CU2_EXCEPTION:

		preempt_disable();

		fpu_enabled = read_c0_status() & ST0_CU1;

		if (!fr)

			set_c0_status(ST0_CU1 | ST0_CU2);

		else

			set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR);

		enable_fpu_hazard();

		KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2);

		if (fr)

			KSTK_STATUS(current) |= ST0_FR;

		else

			KSTK_STATUS(current) &= ~ST0_FR;

		/* If FPU is enabled, we needn't init or restore fp */

		if(!fpu_enabled) {

			set_thread_flag(TIF_USEDFPU);

			if (!used_math()) {

				_init_fpu();

				set_used_math();

			} else

				_restore_fp(current);

		}

		preempt_enable();



		return NOTIFY_STOP;	/* Don't call default notifier */

	}



	return NOTIFY_OK;		/* Let default notifier send signals */

}



static int __init loongson_cu2_setup(void)

{

	return cu2_notifier(loongson_cu2_call, 0);

}

early_initcall(loongson_cu2_setup);

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