Commit ef2c8b81 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2020-12-24' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Xmas eve pull request present.

  Just some fixes that trickled in this past week: Mostly amdgpu fixes,
  with a dma-buf/mips build fix and some misc komeda fixes.

  dma-buf:
   - fix build on mips

  komeda:
   - fix commit tail operation order
   - NULL pointer fix
   - out of bounds access fix

  ttm:
   - remove an unused function

  amdgpu:
   - Vangogh SMU fixes
   - Arcturus gfx9 fixes
   - Misc display fixes
   - Sienna Cichlid SMU update
   - Fix S3 display memory leak
   - Fix regression caused by DP sub-connector support

  amdkfd:
   - Properly require pcie atomics for gfx10"

* tag 'drm-next-2020-12-24' of git://anongit.freedesktop.org/drm/drm: (31 commits)
  drm/amd/display: Fix memory leaks in S3 resume
  drm/amdgpu: Fix a copy-pasta comment
  drm/amdgpu: only set DP subconnector type on DP and eDP connectors
  drm/amd/pm: bump Sienna Cichlid smu_driver_if version to match latest pmfw
  drm/amd/display: add getter routine to retrieve mpcc mux
  drm/amd/display: always program DPPDTO unless not safe to lower
  drm/amd/display: [FW Promotion] Release 0.0.47
  drm/amd/display: updated wm table for Renoir
  drm/amd/display: Acquire DSC during split stream for ODM only if top_pipe
  drm/amd/display: Multi-display underflow observed
  drm/amd/display: Remove unnecessary NULL check
  drm/amd/display: Update RN/VGH active display count workaround
  drm/amd/display: change SMU repsonse timeout to 2s.
  drm/amd/display: gradually ramp ABM intensity
  drm/amd/display: To modify the condition in indicating branch device
  drm/amd/display: Modify the hdcp device count check condition
  drm/amd/display: Interfaces for hubp blank and soft reset
  drm/amd/display: handler not correctly checked at remove_irq_handler
  drm/amdgpu: check gfx pipe availability before toggling its interrupts
  drm/amdgpu: remove unnecessary asic type check
  ...
parents 14571d5f 5b2fc08c
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+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@
#include <linux/module.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>


struct cma_heap {
+6 −4
Original line number Diff line number Diff line
@@ -1414,6 +1414,8 @@ out:
		pm_runtime_put_autosuspend(connector->dev->dev);
	}

	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
	    connector->connector_type == DRM_MODE_CONNECTOR_eDP)
		drm_dp_set_subconnector_property(&amdgpu_connector->base,
						 ret,
						 amdgpu_dig_connector->dpcd,
+1 −2
Original line number Diff line number Diff line
@@ -5069,8 +5069,7 @@ out:
 * @pdev: pointer to PCI device
 *
 * Called when the error recovery driver tells us that its
 * OK to resume normal operation. Use completion to allow
 * halted scsi ops to resume.
 * OK to resume normal operation.
 */
void amdgpu_pci_resume(struct pci_dev *pdev)
{
+2 −1
Original line number Diff line number Diff line
@@ -496,7 +496,8 @@ void amdgpu_gmc_get_vbios_allocations(struct amdgpu_device *adev)
		break;
	}

	if (!amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_DCE)) {
	if (amdgpu_sriov_vf(adev) ||
	    !amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_DCE)) {
		size = 0;
	} else {
		size = amdgpu_gmc_get_vbios_fb_size(adev);
+14 −7
Original line number Diff line number Diff line
@@ -1647,7 +1647,7 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
	}

	/* No CPG in Arcturus */
	if (adev->asic_type != CHIP_ARCTURUS) {
	if (adev->gfx.num_gfx_rings) {
		r = gfx_v9_0_init_cp_gfx_microcode(adev, chip_name);
		if (r)
			return r;
@@ -2633,7 +2633,14 @@ static void gfx_v9_0_wait_for_rlc_serdes(struct amdgpu_device *adev)
static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev,
					       bool enable)
{
	u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
	u32 tmp;

	/* don't toggle interrupts that are only applicable
	 * to me0 pipe0 on AISCs that have me0 removed */
	if (!adev->gfx.num_gfx_rings)
		return;

	tmp= RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);

	tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);
	tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);
@@ -3822,7 +3829,7 @@ static int gfx_v9_0_cp_resume(struct amdgpu_device *adev)
		gfx_v9_0_enable_gui_idle_interrupt(adev, false);

	if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
		if (adev->asic_type != CHIP_ARCTURUS) {
		if (adev->gfx.num_gfx_rings) {
			/* legacy firmware loading */
			r = gfx_v9_0_cp_gfx_load_microcode(adev);
			if (r)
@@ -3838,7 +3845,7 @@ static int gfx_v9_0_cp_resume(struct amdgpu_device *adev)
	if (r)
		return r;

	if (adev->asic_type != CHIP_ARCTURUS) {
	if (adev->gfx.num_gfx_rings) {
		r = gfx_v9_0_cp_gfx_resume(adev);
		if (r)
			return r;
@@ -3848,7 +3855,7 @@ static int gfx_v9_0_cp_resume(struct amdgpu_device *adev)
	if (r)
		return r;

	if (adev->asic_type != CHIP_ARCTURUS) {
	if (adev->gfx.num_gfx_rings) {
		ring = &adev->gfx.gfx_ring[0];
		r = amdgpu_ring_test_helper(ring);
		if (r)
@@ -3884,7 +3891,7 @@ static void gfx_v9_0_init_tcp_config(struct amdgpu_device *adev)

static void gfx_v9_0_cp_enable(struct amdgpu_device *adev, bool enable)
{
	if (adev->asic_type != CHIP_ARCTURUS)
	if (adev->gfx.num_gfx_rings)
		gfx_v9_0_cp_gfx_enable(adev, enable);
	gfx_v9_0_cp_compute_enable(adev, enable);
}
@@ -4025,7 +4032,7 @@ static int gfx_v9_0_soft_reset(void *handle)
		/* stop the rlc */
		adev->gfx.rlc.funcs->stop(adev);

		if (adev->asic_type != CHIP_ARCTURUS)
		if (adev->gfx.num_gfx_rings)
			/* Disable GFX parsing/prefetching */
			gfx_v9_0_cp_gfx_enable(adev, false);

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