ARM: dts: meson: add the audio controllers - WiP (eef3c482) · Commits · 戴 / test

arch/arm/boot/dts/meson.dtsi

+11 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@

		#include <dt-bindings/interrupt-controller/irq.h>
		#include <dt-bindings/interrupt-controller/arm-gic.h>
		#include <dt-bindings/sound/meson-aiu.h>

		/ {
		#address-cells = <1>;
		@@ -36,6 +37,16 @@
		reg = <0x4000 0x400>;
		};

		aiu: audio-controller@5400 {
		compatible = "amlogic,aiu";
		#sound-dai-cells = <2>;
		reg = <0x5400 0x2ac>;
		interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
		<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "i2s", "spdif";
		status = "disabled";
		};

		assist: assist@7c00 {
		compatible = "amlogic,meson-mx-assist", "syscon";
		reg = <0x7c00 0x200>;

+63 −0

Original line number	Diff line number	Diff line
		@@ -448,6 +448,38 @@
		};
		};

		i2s_am_clk_pins: i2s-am-clk-out {
		mux {
		groups = "i2s_am_clk_out_ao";
		function = "i2s_ao";
		bias-disable;
		};
		};

		i2s_out_ao_clk_pins: i2s-ao-clk-out {
		mux {
		groups = "i2s_ao_clk_out_ao";
		function = "i2s_ao";
		bias-disable;
		};
		};

		i2s_out_lr_clk_pins: i2s-lr-clk-out {
		mux {
		groups = "i2s_lr_clk_out_ao";
		function = "i2s_ao";
		bias-disable;
		};
		};

		i2s_out_ch01_ao_pins: i2s-out-ch01 {
		mux {
		groups = "i2s_out_ch01_ao";
		function = "i2s_ao";
		bias-disable;
		};
		};

		uart_ao_a_pins: uart_ao_a {
		mux {
		groups = "uart_tx_ao_a", "uart_rx_ao_a";
		@@ -490,6 +522,29 @@
		};
		};

		&aiu {
		compatible = "amlogic,aiu-meson8", "amlogic,aiu";
		clocks = <&clkc CLKID_AIU_GLUE>,
		<&clkc CLKID_I2S_OUT>,
		<&clkc CLKID_AOCLK_GATE>,
		<&clkc CLKID_CTS_AMCLK>,
		<&clkc CLKID_MIXER_IFACE>,
		<&clkc CLKID_IEC958>,
		<&clkc CLKID_IEC958_GATE>,
		<&clkc CLKID_CTS_MCLK_I958>,
		<&clkc CLKID_CTS_I958>;
		clock-names = "pclk",
		"i2s_pclk",
		"i2s_aoclk",
		"i2s_mclk",
		"i2s_mixer",
		"spdif_pclk",
		"spdif_aoclk",
		"spdif_mclk",
		"spdif_mclk_sel";
		resets = <&reset RESET_AIU>;
		};

		&cbus {
		reset: reset-controller@4404 {
		compatible = "amlogic,meson8b-reset";
		@@ -593,6 +648,14 @@
		};
		};

		spdif_out_pins: spdif-out {
		mux {
		groups = "spdif_out";
		function = "spdif";
		bias-disable;
		};
		};

		spi_nor_pins: nor {
		mux {
		groups = "nor_d", "nor_q", "nor_c", "nor_cs";

+63 −0

Original line number	Diff line number	Diff line
		@@ -415,6 +415,46 @@
		};
		};

		i2s_am_clk_pins: i2s-am-clk-out {
		mux {
		groups = "i2s_am_clk_out";
		function = "i2s";
		bias-disable;
		};
		};

		i2s_out_ao_clk_pins: i2s-ao-clk-out {
		mux {
		groups = "i2s_ao_clk_out";
		function = "i2s";
		bias-disable;
		};
		};

		i2s_out_lr_clk_pins: i2s-lr-clk-out {
		mux {
		groups = "i2s_lr_clk_out";
		function = "i2s";
		bias-disable;
		};
		};

		i2s_out_ch01_ao_pins: i2s-out-ch01 {
		mux {
		groups = "i2s_out_01";
		function = "i2s";
		bias-disable;
		};
		};

		spdif_out_1_pins: spdif-out-1 {
		mux {
		groups = "spdif_out_1";
		function = "spdif_1";
		bias-disable;
		};
		};

		uart_ao_a_pins: uart_ao_a {
		mux {
		groups = "uart_tx_ao_a", "uart_rx_ao_a";
		@@ -441,6 +481,29 @@
		};
		};

		&aiu {
		compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
		clocks = <&clkc CLKID_AIU_GLUE>,
		<&clkc CLKID_I2S_OUT>,
		<&clkc CLKID_AOCLK_GATE>,
		<&clkc CLKID_CTS_AMCLK>,
		<&clkc CLKID_MIXER_IFACE>,
		<&clkc CLKID_IEC958>,
		<&clkc CLKID_IEC958_GATE>,
		<&clkc CLKID_CTS_MCLK_I958>,
		<&clkc CLKID_CTS_I958>;
		clock-names = "pclk",
		"i2s_pclk",
		"i2s_aoclk",
		"i2s_mclk",
		"i2s_mixer",
		"spdif_pclk",
		"spdif_aoclk",
		"spdif_mclk",
		"spdif_mclk_sel";
		resets = <&reset RESET_AIU>;
		};

		&cbus {
		reset: reset-controller@4404 {
		compatible = "amlogic,meson8b-reset";