Commit eed85ff4 authored by Keith Busch's avatar Keith Busch Committed by Bjorn Helgaas
Browse files

PCI/DPC: Enable DPC only if AER is available 



The "Determination of DPC Control" implementation note in PCIe r4.0, sec
6.1.10, recommends the operating system always link DPC control to the
control of AER, as the two functionalities are strongly connected.

To avoid conflicts over whether platform firmware or the OS controls DPC,
enable DPC only if AER is enabled in the OS, and the device's error
handling does not have firmware-first AER handling.

Signed-off-by: default avatarKeith Busch <keith.busch@intel.com>
Signed-off-by: default avatarBjorn Helgaas <helgaas@kernel.org>
parent aa6ca5a9

drivers/pci/pcie/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ config PCIE_PME 


config PCIE_DPC

	bool "PCIe Downstream Port Containment support"

	depends on PCIEPORTBUS

	depends on PCIEPORTBUS && PCIEAER

	default n

	help

	  This enables PCI Express Downstream Port Containment (DPC)

drivers/pci/pcie/pcie-dpc.c

+4 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <linux/pci.h>

#include <linux/pcieport_if.h>

#include "../pci.h"

#include "aer/aerdrv.h"



struct rp_pio_header_log_regs {

	u32 dw0;
@@ -309,6 +310,9 @@ static int dpc_probe(struct pcie_device *dev) 
	int status;

	u16 ctl, cap;



	if (pcie_aer_get_firmware_first(pdev))

		return -ENOTSUPP;



	dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);

	if (!dpc)

		return -ENOMEM;

drivers/pci/pcie/portdrv_core.c

+2 −2
Original line number Diff line number Diff line
@@ -216,9 +216,9 @@ static int get_port_device_capability(struct pci_dev *dev) 
		return 0;



	cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP

			| PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;

			| PCIE_PORT_SERVICE_VC;

	if (pci_aer_available())

		cap_mask |= PCIE_PORT_SERVICE_AER;

		cap_mask |= PCIE_PORT_SERVICE_AER | PCIE_PORT_SERVICE_DPC;



	if (pcie_ports_auto)

		pcie_port_platform_notify(dev, &cap_mask);

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