Commit eeab133e authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Lorenzo Pieralisi
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dt-bindings: PCI: Add UniPhier PCIe endpoint controller description

Add DT bindings for PCIe controller implemented in UniPhier SoCs
when configured in endpoint mode. This controller is based on
the DesignWare PCIe core.

Link: https://lore.kernel.org/r/1589457801-12796-2-git-send-email-hayashi.kunihiko@socionext.com


Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
parent 03f8c1b3
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+92 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Socionext UniPhier PCIe endpoint controller

description: |
  UniPhier PCIe endpoint controller is based on the Synopsys DesignWare
  PCI core. It shares common features with the PCIe DesignWare core and
  inherits common properties defined in
  Documentation/devicetree/bindings/pci/designware-pcie.txt.

maintainers:
  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

allOf:
  - $ref: "pci-ep.yaml#"

properties:
  compatible:
    const: socionext,uniphier-pro5-pcie-ep

  reg:
    maxItems: 4

  reg-names:
    items:
      - const: dbi
      - const: dbi2
      - const: link
      - const: addr_space

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: gio
      - const: link

  resets:
    maxItems: 2

  reset-names:
    items:
      - const: gio
      - const: link

  num-ib-windows:
    const: 16

  num-ob-windows:
    const: 16

  num-lanes: true

  phys:
    maxItems: 1

  phy-names:
    const: pcie-phy

required:
  - compatible
  - reg
  - reg-names
  - clocks
  - clock-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    pcie_ep: pcie-ep@66000000 {
        compatible = "socionext,uniphier-pro5-pcie-ep";
        reg-names = "dbi", "dbi2", "link", "addr_space";
        reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
              <0x66010000 0x10000>, <0x67000000 0x400000>;
        clock-names = "gio", "link";
        clocks = <&sys_clk 12>, <&sys_clk 24>;
        reset-names = "gio", "link";
        resets = <&sys_rst 12>, <&sys_rst 24>;
        num-ib-windows = <16>;
        num-ob-windows = <16>;
        num-lanes = <4>;
        phy-names = "pcie-phy";
        phys = <&pcie_phy>;
    };
+1 −1
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@@ -13142,7 +13142,7 @@ PCIE DRIVER FOR SOCIONEXT UNIPHIER
M:	Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/pci/uniphier-pcie.txt
F:	Documentation/devicetree/bindings/pci/uniphier-pcie*
F:	drivers/pci/controller/dwc/pcie-uniphier.c
PCIE DRIVER FOR ST SPEAR13XX