Commit ee765924 authored by George Shen's avatar George Shen Committed by Alex Deucher
Browse files

drm/amd/display: Add w/a to reset PHY before link training in verify_link_cap 



[Why]
PHY will sometimes be in bad state on hotplugging display from USB-C
dongle.

[How]
Add additional calls to disable and then enable PHY before link training
starts during verify_link_cap.

Signed-off-by: default avatarGeorge Shen <george.shen@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5adc673c

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+10 −0
Original line number Diff line number Diff line
@@ -1892,6 +1892,16 @@ bool dp_verify_link_cap( 
	/* disable PHY done possible by BIOS, will be done by driver itself */

	dp_disable_link_phy(link, link->connector_signal);



	/* Temporary Renoir-specific workaround for SWDEV-215184;

	 * PHY will sometimes be in bad state on hotplugging display from certain USB-C dongle,

	 * so add extra cycle of enabling and disabling the PHY before first link training.

	 */

	if (link->link_enc->features.flags.bits.DP_IS_USB_C &&

			link->dc->debug.usbc_combo_phy_reset_wa) {

		dp_enable_link_phy(link, link->connector_signal, dp_cs_id, cur);

		dp_disable_link_phy(link, link->connector_signal);

	}



	dp_cs_id = get_clock_source_id(link);



	/* link training starts with the maximum common settings

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -421,6 +421,7 @@ struct dc_debug_options { 
	bool disable_dram_clock_change_vactive_support;

	bool validate_dml_output;

	bool enable_dmcub_surface_flip;

	bool usbc_combo_phy_reset_wa;

};



struct dc_debug_data {

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+2 −1
Original line number Diff line number Diff line
@@ -835,7 +835,8 @@ static const struct dc_debug_options debug_defaults_drv = { 
		.scl_reset_length10 = true,

		.sanity_checks = true,

		.disable_48mhz_pwrdwn = false,

		.nv12_iflip_vm_wa = true

		.nv12_iflip_vm_wa = true,

		.usbc_combo_phy_reset_wa = true

};



static const struct dc_debug_options debug_defaults_diags = {

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