Commit ee352c27 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi
Browse files

PCI: xilinx: Use pci_parse_request_of_pci_ranges() 



Convert the Xilinx host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>
parent 83083e24

drivers/pci/controller/pcie-xilinx.c

+2 −15
Original line number Diff line number Diff line
@@ -619,8 +619,6 @@ static int xilinx_pcie_probe(struct platform_device *pdev) 
	struct pci_bus *bus, *child;

	struct pci_host_bridge *bridge;

	int err;

	resource_size_t iobase = 0;

	LIST_HEAD(res);



	if (!dev->of_node)

		return -ENODEV;
@@ -647,19 +645,12 @@ static int xilinx_pcie_probe(struct platform_device *pdev) 
		return err;

	}



	err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res,

						    &iobase);

	err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);

	if (err) {

		dev_err(dev, "Getting bridge resources failed\n");

		return err;

	}



	err = devm_request_pci_bus_resources(dev, &res);

	if (err)

		goto error;





	list_splice_init(&res, &bridge->windows);

	bridge->dev.parent = dev;

	bridge->sysdata = port;

	bridge->busnr = 0;
@@ -673,7 +664,7 @@ static int xilinx_pcie_probe(struct platform_device *pdev) 
#endif

	err = pci_scan_root_bus_bridge(bridge);

	if (err < 0)

		goto error;

		return err;



	bus = bridge->bus;
@@ -682,10 +673,6 @@ static int xilinx_pcie_probe(struct platform_device *pdev) 
		pcie_bus_configure_settings(child);

	pci_bus_add_devices(bus);

	return 0;



error:

	pci_free_resource_list(&res);

	return err;

}



static const struct of_device_id xilinx_pcie_of_match[] = {

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