ARM: imx: remove imx_scu_standby_enable() (ee295d7f) · Commits · 戴 / test

arch/arm/mach-imx/common.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -98,11 +98,9 @@ void imx_set_cpu_arg(int cpu, u32 arg);
		void v7_secondary_startup(void);
		void imx_scu_map_io(void);
		void imx_smp_prepare(void);
		void imx_scu_standby_enable(void);
		#else
		static inline void imx_scu_map_io(void) {}
		static inline void imx_smp_prepare(void) {}
		static inline void imx_scu_standby_enable(void) {}
		#endif
		void imx_src_init(void);
		void imx_gpc_init(void);

+0 −4

Original line number	Diff line number	Diff line
		@@ -66,10 +66,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = {

		int __init imx6q_cpuidle_init(void)
		{
		/* Need to enable SCU standby for entering WAIT modes */
		if (!cpu_is_imx6sx())
		imx_scu_standby_enable();

		/* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */
		imx6q_set_int_mem_clk_lpm(true);

+0 −10

Original line number	Diff line number	Diff line
		@@ -20,8 +20,6 @@
		#include "common.h"
		#include "hardware.h"

		#define SCU_STANDBY_ENABLE (1 << 5)

		u32 g_diag_reg;
		static void __iomem *scu_base;

		@@ -45,14 +43,6 @@ void __init imx_scu_map_io(void)
		scu_base = IMX_IO_ADDRESS(base);
		}

		void imx_scu_standby_enable(void)
		{
		u32 val = readl_relaxed(scu_base);

		val \|= SCU_STANDBY_ENABLE;
		writel_relaxed(val, scu_base);
		}

		static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
		{
		imx_set_cpu_jump(cpu, v7_secondary_startup);