soc/tegra: bpmp: Update ABI header (ee22d0c5) · Commits · 戴 / test

include/soc/tegra/bpmp-abi.h

+9 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
		* Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
		*/

		#ifndef _ABI_BPMP_ABI_H_
		@@ -2119,6 +2119,7 @@ enum {
		CMD_UPHY_PCIE_LANE_MARGIN_STATUS = 2,
		CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT = 3,
		CMD_UPHY_PCIE_CONTROLLER_STATE = 4,
		CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF = 5,
		CMD_UPHY_MAX,
		};

		@@ -2151,6 +2152,11 @@ struct cmd_uphy_pcie_controller_state_request {
		uint8_t enable;
		} __ABI_PACKED;

		struct cmd_uphy_ep_controller_pll_off_request {
		/** @brief EP controller number, valid: 0, 4, 5 */
		uint8_t ep_controller;
		} __ABI_PACKED;

		/**
		* @ingroup UPHY
		* @brief Request with #MRQ_UPHY
		@@ -2165,6 +2171,7 @@ struct cmd_uphy_pcie_controller_state_request {
		* \|CMD_UPHY_PCIE_LANE_MARGIN_STATUS \| \|
		* \|CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT \|cmd_uphy_ep_controller_pll_init_request \|
		* \|CMD_UPHY_PCIE_CONTROLLER_STATE \|cmd_uphy_pcie_controller_state_request \|
		* \|CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF \|cmd_uphy_ep_controller_pll_off_request \|
		*
		*/

		@@ -2178,6 +2185,7 @@ struct mrq_uphy_request {
		struct cmd_uphy_margin_control_request uphy_set_margin_control;
		struct cmd_uphy_ep_controller_pll_init_request ep_ctrlr_pll_init;
		struct cmd_uphy_pcie_controller_state_request controller_state;
		struct cmd_uphy_ep_controller_pll_off_request ep_ctrlr_pll_off;
		} __UNION_ANON;
		} __ABI_PACKED;