Commit ee1d28a4 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v5.5-rockchip-dts64-1' of... 

Merge tag 'v5.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

A lot of improvements for the (till now) somewhat dormant px30 soc,
power-tree improvements ofr the roc-rk3399-pc, after a long wait
also support for the CR50 TPM device found on some RK3399-Gru devices,
some audio and gmac improvements for NanoPi4 and Rockpro64 as well
as marking the redundant RK_FUNC_x -> x mapping as deprecated and
fixing a missing #msi-cells on rk3399.

* tag 'v5.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  include: dt-bindings: rockchip: mark RK_FUNC defines as deprecated
  arm64: dts: rockchip: restyle rockchip,pins on rk3399-rock-pi-4
  arm64: dts: rockchip: Update nanopi4 phy reset properties
  arm64: dts: rockchip: Enable nanopi4 HDMI audio
  arm64: dts: rockchip: add cr50 tpm to rk3399-gru scarlet and bob
  arm64: dts: rockchip: add analog audio nodes on rk3399-rockpro64
  arm64: dts: rockchip: add missing #msi-cells to rk3399
  arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails
  arm64: dts: rockchip: Rename vcc12v_sys into dc_12v for roc-rk3399-pc
  dt-bindings: document PX30 usb2phy General Register Files
  arm64: dts: rockchip: add px30-evb i2c1 devices
  arm64: dts: rockchip: document explicit px30 cru dependencies
  arm64: dts: rockchip: remove unused pin settings from px30
  arm64: dts: rockchip: move px30-evb console output to uart 5
  arm64: dts: rockchip: add emmc-powersequence to px30-evb
  arm64: dts: rockchip: fix the px30-evb power tree
  arm64: dts: rockchip: add default px30 emmc pinctrl
  arm64: dts: rockchip: remove px30 emmc_pwren pinctrl
  arm64: dts: rockchip: remove static xin32k from px30
  arm64: dts: rockchip: fix iface clock-name on px30 iommus

Link: https://lore.kernel.org/r/1650793.YZj09CGBNl@phil


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 832e1173 d083ce42

Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt

+5 −0
Original line number Diff line number Diff line
@@ -10,6 +10,11 @@ Required Properties: 
- compatible: CRU should be "rockchip,px30-cru"

- reg: physical base address of the controller and length of memory mapped

  region.

- clocks: A list of phandle + clock-specifier pairs for the clocks listed

          in clock-names

- clock-names: Should contain the following:

  - "xin24m" for both PMUCRU and CRU

  - "gpll" for CRU (sourced from PMUCRU)

- #clock-cells: should be 1.

- #reset-cells: should be 1.

Documentation/devicetree/bindings/soc/rockchip/grf.txt

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ Required Properties: 
- compatible: SGRF should be one of the following

   - "rockchip,rk3288-sgrf", "syscon": for rk3288

- compatible: USB2PHYGRF should be one of the followings

   - "rockchip,px30-usb2phy-grf", "syscon": for px30

   - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328

- compatible: USBGRF should be one of the following

   - "rockchip,rv1108-usbgrf", "syscon": for rv1108

arch/arm64/boot/dts/rockchip/px30-evb.dts

+299 −10
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
	compatible = "rockchip,px30-evb", "rockchip,px30";



	chosen {

		stdout-path = "serial2:1500000n8";

		stdout-path = "serial5:115200n8";

	};



	adc-keys {
@@ -58,6 +58,14 @@ 
	backlight: backlight {

		compatible = "pwm-backlight";

		pwms = <&pwm1 0 25000 0>;

		power-supply = <&vcc3v3_lcd>;

	};



	emmc_pwrseq: emmc-pwrseq {

		compatible = "mmc-pwrseq-emmc";

		pinctrl-0 = <&emmc_reset>;

		pinctrl-names = "default";

		reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;

	};



	sdio_pwrseq: sdio-pwrseq {
@@ -74,13 +82,6 @@ 
		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */

	};



	vcc_phy: vcc-phy-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_phy";

		regulator-always-on;

		regulator-boot-on;

	};



	vcc5v0_sys: vccsys {

		compatible = "regulator-fixed";

		regulator-name = "vcc5v0_sys";
@@ -91,6 +92,22 @@ 
	};

};



&cpu0 {

	cpu-supply = <&vdd_arm>;

};



&cpu1 {

	cpu-supply = <&vdd_arm>;

};



&cpu2 {

	cpu-supply = <&vdd_arm>;

};



&cpu3 {

	cpu-supply = <&vdd_arm>;

};



&display_subsystem {

	status = "okay";

};
@@ -100,12 +117,15 @@ 
	cap-mmc-highspeed;

	mmc-hs200-1_8v;

	non-removable;

	mmc-pwrseq = <&emmc_pwrseq>;

	vmmc-supply = <&vcc_3v0>;

	vqmmc-supply = <&vccio_flash>;

	status = "okay";

};



&gmac {

	clock_in_out = "output";

	phy-supply = <&vcc_phy>;

	phy-supply = <&vcc_rmii>;

	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;

	snps,reset-active-low;

	snps,reset-delays-us = <0 50000 50000>;
@@ -114,6 +134,256 @@ 


&i2c0 {

	status = "okay";



	rk809: pmic@20 {

		compatible = "rockchip,rk809";

		reg = <0x20>;

		interrupt-parent = <&gpio0>;

		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&pmic_int>;

		rockchip,system-power-controller;

		wakeup-source;

		#clock-cells = <0>;

		clock-output-names = "xin32k";



		vcc1-supply = <&vcc5v0_sys>;

		vcc2-supply = <&vcc5v0_sys>;

		vcc3-supply = <&vcc5v0_sys>;

		vcc4-supply = <&vcc5v0_sys>;

		vcc5-supply = <&vcc3v3_sys>;

		vcc6-supply = <&vcc3v3_sys>;

		vcc7-supply = <&vcc3v3_sys>;

		vcc8-supply = <&vcc3v3_sys>;

		vcc9-supply = <&vcc5v0_sys>;



		regulators {

			vdd_log: DCDC_REG1 {

				regulator-name = "vdd_log";

				regulator-min-microvolt = <950000>;

				regulator-max-microvolt = <1350000>;

				regulator-ramp-delay = <6001>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <950000>;

				};

			};



			vdd_arm: DCDC_REG2 {

				regulator-name = "vdd_arm";

				regulator-min-microvolt = <950000>;

				regulator-max-microvolt = <1350000>;

				regulator-ramp-delay = <6001>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-off-in-suspend;

					regulator-suspend-microvolt = <950000>;

				};

			};



			vcc_ddr: DCDC_REG3 {

				regulator-name = "vcc_ddr";

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

				};

			};



			vcc_3v0: vcc_rmii: DCDC_REG4 {

				regulator-name = "vcc_3v0";

				regulator-min-microvolt = <3000000>;

				regulator-max-microvolt = <3000000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3000000>;

				};

			};



			vcc3v3_sys: DCDC_REG5 {

				regulator-name = "vcc3v3_sys";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vcc_1v0: LDO_REG1 {

				regulator-name = "vcc_1v0";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1000000>;

				};

			};



			vcc_1v8: vccio_flash: vccio_sdio: LDO_REG2 {

				regulator-name = "vcc_1v8";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vdd_1v0: LDO_REG3 {

				regulator-name = "vdd_1v0";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1000000>;

				};

			};



			vcc3v0_pmu: LDO_REG4 {

				regulator-name = "vcc3v0_pmu";

				regulator-min-microvolt = <3000000>;

				regulator-max-microvolt = <3000000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3000000>;

				};

			};



			vccio_sd: LDO_REG5 {

				regulator-name = "vccio_sd";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vcc_sd: LDO_REG6 {

				regulator-name = "vcc_sd";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <3300000>;

				};

			};



			vcc2v8_dvp: LDO_REG7 {

				regulator-name = "vcc2v8_dvp";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-boot-on;



				regulator-state-mem {

					regulator-off-in-suspend;

					regulator-suspend-microvolt = <2800000>;

				};

			};



			vcc1v8_dvp: LDO_REG8 {

				regulator-name = "vcc1v8_dvp";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-boot-on;



				regulator-state-mem {

					regulator-on-in-suspend;

					regulator-suspend-microvolt = <1800000>;

				};

			};



			vcc1v5_dvp: LDO_REG9 {

				regulator-name = "vcc1v5_dvp";

				regulator-min-microvolt = <1500000>;

				regulator-max-microvolt = <1500000>;

				regulator-boot-on;



				regulator-state-mem {

					regulator-off-in-suspend;

					regulator-suspend-microvolt = <1500000>;

				};

			};



			vcc3v3_lcd: SWITCH_REG1 {

				regulator-name = "vcc3v3_lcd";

				regulator-boot-on;

			};



			vcc5v0_host: SWITCH_REG2 {

				regulator-name = "vcc5v0_host";

				regulator-always-on;

				regulator-boot-on;

			};

		};

	};

};



&i2c1 {

	status = "okay";



	sensor@d {

		compatible = "asahi-kasei,ak8963";

		reg = <0x0d>;

		gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;

		vdd-supply = <&vcc3v0_pmu>;

		mount-matrix = "1", /* x0 */

			       "0", /* y0 */

			       "0", /* z0 */

			       "0", /* x1 */

			       "1", /* y1 */

			       "0", /* z1 */

			       "0", /* x2 */

			       "0", /* y2 */

			       "1"; /* z2 */

	};



	touchscreen@14 {

		compatible = "goodix,gt1151";

		reg = <0x14>;

		interrupt-parent = <&gpio0>;

		interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;

		irq-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;

		reset-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;

		VDDIO-supply = <&vcc3v3_lcd>;

	};



	sensor@4c {

		compatible = "fsl,mma7660";

		reg = <0x4c>;

		interrupt-parent = <&gpio0>;

		interrupts = <RK_PB7 IRQ_TYPE_LEVEL_LOW>;

	};

};



&i2s1_2ch {
@@ -122,6 +392,13 @@ 


&io_domains {

	status = "okay";



	vccio1-supply = <&vccio_sdio>;

	vccio2-supply = <&vccio_sd>;

	vccio3-supply = <&vcc_3v0>;

	vccio4-supply = <&vcc3v0_pmu>;

	vccio5-supply = <&vcc_3v0>;

	vccio6-supply = <&vccio_flash>;

};



&pinctrl {
@@ -132,6 +409,12 @@ 
		};

	};



	emmc {

		emmc_reset: emmc-reset {

			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	pmic {

		pmic_int: pmic_int {

			rockchip,pins =
@@ -164,6 +447,9 @@ 


&pmu_io_domains {

	status = "okay";



	pmuio1-supply = <&vcc3v0_pmu>;

	pmuio2-supply = <&vcc3v0_pmu>;

};



&pwm1 {
@@ -171,6 +457,7 @@ 
};



&saradc {

	vref-supply = <&vcc_1v8>;

	status = "okay";

};
@@ -183,6 +470,8 @@ 
	sd-uhs-sdr25;

	sd-uhs-sdr50;

	sd-uhs-sdr104;

	vmmc-supply = <&vcc_sd>;

	vqmmc-supply = <&vccio_sd>;

	status = "okay";

};
@@ -202,7 +491,7 @@ 
	status = "okay";

};



&uart2 {

&uart5 {

	status = "okay";

};

arch/arm64/boot/dts/rockchip/px30.dtsi

+19 −64
Original line number Diff line number Diff line
@@ -195,13 +195,6 @@ 
		clock-output-names = "xin24m";

	};



	xin32k: xin32k {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <32768>;

		clock-output-names = "xin32k";

	};



	pmu: power-management@ff000000 {

		compatible = "rockchip,px30-pmu", "syscon", "simple-mfd";

		reg = <0x0 0xff000000 0x0 0x1000>;
@@ -674,33 +667,38 @@ 
	cru: clock-controller@ff2b0000 {

		compatible = "rockchip,px30-cru";

		reg = <0x0 0xff2b0000 0x0 0x1000>;

		clocks = <&xin24m>, <&pmucru PLL_GPLL>;

		clock-names = "xin24m", "gpll";

		rockchip,grf = <&grf>;

		#clock-cells = <1>;

		#reset-cells = <1>;



		assigned-clocks = <&cru PLL_NPLL>;

		assigned-clock-rates = <1188000000>;

		assigned-clocks = <&cru PLL_NPLL>,

			<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,

			<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,

			<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;



		assigned-clock-rates = <1188000000>,

			<200000000>, <200000000>,

			<150000000>, <150000000>,

			<100000000>, <200000000>;

	};



	pmucru: clock-controller@ff2bc000 {

		compatible = "rockchip,px30-pmucru";

		reg = <0x0 0xff2bc000 0x0 0x1000>;

		clocks = <&xin24m>;

		clock-names = "xin24m";

		rockchip,grf = <&grf>;

		#clock-cells = <1>;

		#reset-cells = <1>;



		assigned-clocks =

			<&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,

			<&pmucru SCLK_WIFI_PMU>, <&cru ARMCLK>,

			<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,

			<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,

			<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;

			<&pmucru SCLK_WIFI_PMU>;

		assigned-clock-rates =

			<1200000000>, <100000000>,

			<26000000>, <600000000>,

			<200000000>, <200000000>,

			<150000000>, <150000000>,

			<100000000>, <200000000>;

			<26000000>;

	};



	usb20_otg: usb@ff300000 {
@@ -801,6 +799,8 @@ 
		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";

		fifo-depth = <0x100>;

		max-frequency = <150000000>;

		pinctrl-names = "default";

		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;

		power-domains = <&power PX30_PD_MMC_NAND>;

		status = "disabled";

	};
@@ -831,7 +831,7 @@ 
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopb_mmu";

		clocks = <&cru ACLK_VOPB>, <&cru HCLK_VOPB>;

		clock-names = "aclk", "hclk";

		clock-names = "aclk", "iface";

		power-domains = <&power PX30_PD_VO>;

		#iommu-cells = <0>;

		status = "disabled";
@@ -863,7 +863,7 @@ 
		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopl_mmu";

		clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;

		clock-names = "aclk", "hclk";

		clock-names = "aclk", "iface";

		power-domains = <&power PX30_PD_VO>;

		#iommu-cells = <0>;

		status = "disabled";
@@ -1164,11 +1164,6 @@ 
				rockchip,pins =

					<0 RK_PB5 1 &pcfg_pull_none>;

			};



			uart0_rts_gpio: uart0-rts-gpio {

				rockchip,pins =

					<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;

			};

		};



		uart1 {
@@ -1187,11 +1182,6 @@ 
				rockchip,pins =

					<1 RK_PC3 1 &pcfg_pull_none>;

			};



			uart1_rts_gpio: uart1-rts-gpio {

				rockchip,pins =

					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;

			};

		};



		uart2-m0 {
@@ -1226,11 +1216,6 @@ 
				rockchip,pins =

					<0 RK_PC3 2 &pcfg_pull_none>;

			};



			uart3m0_rts_gpio: uart3m0-rts-gpio {

				rockchip,pins =

					<0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;

			};

		};



		uart3-m1 {
@@ -1249,11 +1234,6 @@ 
				rockchip,pins =

					<1 RK_PB5 2 &pcfg_pull_none>;

			};



			uart3m1_rts_gpio: uart3m1-rts-gpio {

				rockchip,pins =

					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;

			};

		};



		uart4 {
@@ -1602,16 +1582,6 @@ 
					<1 RK_PD4 1 &pcfg_pull_up_8ma>,

					<1 RK_PD5 1 &pcfg_pull_up_8ma>;

			};



			sdmmc_gpio: sdmmc-gpio {

				rockchip,pins =

					<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,

					<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,

					<1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,

					<1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,

					<1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,

					<1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;

			};

		};



		sdio {
@@ -1632,16 +1602,6 @@ 
					<1 RK_PD0 1 &pcfg_pull_up>,

					<1 RK_PD1 1 &pcfg_pull_up>;

			};



			sdio_gpio: sdio-gpio {

				rockchip,pins =

					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,

					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,

					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,

					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>,

					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,

					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;

			};

		};



		emmc {
@@ -1655,11 +1615,6 @@ 
					<1 RK_PB2 2 &pcfg_pull_up_8ma>;

			};



			emmc_pwren: emmc-pwren {

				rockchip,pins =

					<1 RK_PB0 2 &pcfg_pull_none>;

			};



			emmc_rstnout: emmc-rstnout {

				rockchip,pins =

					<1 RK_PB3 2 &pcfg_pull_none>;

arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts

+10 −0
Original line number Diff line number Diff line
@@ -68,6 +68,16 @@ 


&spi0 {

	status = "okay";



	cr50@0 {

		compatible = "google,cr50";

		reg = <0>;

		interrupt-parent = <&gpio0>;

		interrupts = <5 IRQ_TYPE_EDGE_RISING>;

		pinctrl-names = "default";

		pinctrl-0 = <&h1_int_od_l>;

		spi-max-frequency = <800000>;

	};

};



&pinctrl {

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