Commit edf17b28 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'staging-5.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging 

Pull staging/IIO driver fixes from Greg KH:
 "Here are some small staging and IIO driver fixes for 5.7-rc3

  Lots of tiny things for reported issues in staging and IIO drivers,
  including a counter driver fix as well (the iio drivers seem to be
  tied to those). Full details of the fixes are in the shortlog.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'staging-5.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (27 commits)
  staging: vt6656: Fix calling conditions of vnt_set_bss_mode
  staging: comedi: Fix comedi_device refcnt leak in comedi_open
  staging: vt6656: Fix pairwise key entry save.
  staging: vt6656: Fix drivers TBTT timing counter.
  staging: vt6656: Don't set RCR_MULTICAST or RCR_BROADCAST by default.
  MAINTAINERS: remove Stefan Popa's email
  iio: adc: ad7192: fix null pointer de-reference crash during probe
  iio: core: remove extra semi-colon from devm_iio_device_register() macro
  iio: adc: ti-ads8344: properly byte swap value
  iio: imu: inv_mpu6050: fix suspend/resume with runtime power
  iio: st_sensors: rely on odr mask to know if odr can be set
  iio: xilinx-xadc: Make sure not exceed maximum samplerate
  iio: xilinx-xadc: Fix sequencer configuration for aux channels in simultaneous mode
  iio: xilinx-xadc: Fix clearing interrupt when enabling trigger
  iio: xilinx-xadc: Fix ADC-B powerdown
  iio: dac: ad5770r: fix off-by-one check on maximum number of channels
  iio: imu: st_lsm6dsx: flush hw FIFO before resetting the device
  iio: core: Fix handling of 'dB'
  dt-bindings: iio: adc: stm32-adc: fix id relative path
  counter: 104-quad-8: Add lock guards - generic interface
  ...
parents a8a0e2a9 664ba518

Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/bindings/iio/adc/st,stm32-adc.yaml#"

$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: STMicroelectronics STM32 ADC bindings

MAINTAINERS

+7 −8
Original line number Diff line number Diff line
@@ -570,7 +570,7 @@ F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml 
F:	drivers/input/misc/adxl34x.c















ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <michael.hennerich@analog.com>















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers















F:	Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml










@@ -922,7 +922,7 @@ F:	arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi













F:	drivers/net/ethernet/amd/xgbe/





























ANALOG DEVICES INC AD5686 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















L:	linux-pm@vger.kernel.org















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers









@@ -930,7 +930,7 @@ F:	drivers/iio/dac/ad5686*













F:	drivers/iio/dac/ad5696*





























ANALOG DEVICES INC AD5758 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















L:	linux-iio@vger.kernel.org















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers









@@ -946,7 +946,7 @@ F:	Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml













F:	drivers/iio/adc/ad7091r5.c





























ANALOG DEVICES INC AD7124 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















L:	linux-iio@vger.kernel.org















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers









@@ -970,7 +970,7 @@ F:	Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml













F:	drivers/iio/adc/ad7292.c





























ANALOG DEVICES INC AD7606 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















M:	Beniamin Bia <beniamin.bia@analog.com>















L:	linux-iio@vger.kernel.org















S:	Supported









@@ -979,7 +979,7 @@ F:	Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml













F:	drivers/iio/adc/ad7606.c





























ANALOG DEVICES INC AD7768-1 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















L:	linux-iio@vger.kernel.org















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers










@@ -1040,7 +1040,7 @@ F:	Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml













F:	drivers/hwmon/adm1177.c





























ANALOG DEVICES INC ADP5061 DRIVER













M:	Stefan Popa <stefan.popa@analog.com>













M:	Michael Hennerich <Michael.Hennerich@analog.com>















L:	linux-pm@vger.kernel.org















S:	Supported















W:	http://ez.analog.com/community/linux-device-drivers










@@ -1109,7 +1109,6 @@ F:	drivers/iio/amplifiers/hmc425a.c













ANALOG DEVICES INC IIO DRIVERS















M:	Lars-Peter Clausen <lars@metafoo.de>















M:	Michael Hennerich <Michael.Hennerich@analog.com>













M:	Stefan Popa <stefan.popa@analog.com>















S:	Supported















W:	http://wiki.analog.com/















W:	http://ez.analog.com/community/linux-device-drivers

































drivers/counter/104-quad-8.c



+160
−34






























Original line number
Diff line number
Diff line








@@ -44,6 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");













 * @base:		base port address of the IIO device















 */















struct quad8_iio {













	struct mutex lock;















	struct counter_device counter;















	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];















	unsigned int preset[QUAD8_NUM_COUNTERS];










@@ -123,6 +124,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev,













		/* Borrow XOR Carry effectively doubles count range */















		*val = (borrow ^ carry) << 24;





























		mutex_lock(&priv->lock);





























		/* Reset Byte Pointer; transfer Counter to Output Latch */















		outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,















		     base_offset + 1);









@@ -130,6 +133,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev,













		for (i = 0; i < 3; i++)















			*val |= (unsigned int)inb(base_offset) << (8 * i);





























		mutex_unlock(&priv->lock);





























		return IIO_VAL_INT;















	case IIO_CHAN_INFO_ENABLE:















		*val = priv->ab_enable[chan->channel];










@@ -160,6 +165,8 @@ static int quad8_write_raw(struct iio_dev *indio_dev,













		if ((unsigned int)val > 0xFFFFFF)















			return -EINVAL;





























		mutex_lock(&priv->lock);





























		/* Reset Byte Pointer */















		outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);

























@@ -183,12 +190,16 @@ static int quad8_write_raw(struct iio_dev *indio_dev,













		/* Reset Error flag */















		outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);





























		mutex_unlock(&priv->lock);





























		return 0;















	case IIO_CHAN_INFO_ENABLE:















		/* only boolean values accepted */















		if (val < 0 || val > 1)















			return -EINVAL;





























		mutex_lock(&priv->lock);





























		priv->ab_enable[chan->channel] = val;































		ior_cfg = val | priv->preset_enable[chan->channel] << 1;









@@ -196,11 +207,18 @@ static int quad8_write_raw(struct iio_dev *indio_dev,













		/* Load I/O control configuration */















		outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1);





























		mutex_unlock(&priv->lock);





























		return 0;















	case IIO_CHAN_INFO_SCALE:













		mutex_lock(&priv->lock);





























		/* Quadrature scaling only available in quadrature mode */













		if (!priv->quadrature_mode[chan->channel] && (val2 || val != 1))













		if (!priv->quadrature_mode[chan->channel] &&













				(val2 || val != 1)) {













			mutex_unlock(&priv->lock);















			return -EINVAL;













		}































		/* Only three gain states (1, 0.5, 0.25) */















		if (val == 1 && !val2)









@@ -214,11 +232,15 @@ static int quad8_write_raw(struct iio_dev *indio_dev,













				priv->quadrature_scale[chan->channel] = 2;















				break;















			default:













				mutex_unlock(&priv->lock);















				return -EINVAL;















			}













		else













		else {













			mutex_unlock(&priv->lock);















			return -EINVAL;













		}





























		mutex_unlock(&priv->lock);















		return 0;















	}


























@@ -255,6 +277,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private,













	if (preset > 0xFFFFFF)















		return -EINVAL;





























	mutex_lock(&priv->lock);





























	priv->preset[chan->channel] = preset;































	/* Reset Byte Pointer */









@@ -264,6 +288,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private,













	for (i = 0; i < 3; i++)















		outb(preset >> (8 * i), base_offset);





























	mutex_unlock(&priv->lock);





























	return len;















}


























@@ -293,6 +319,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,













	/* Preset enable is active low in Input/Output Control register */















	preset_enable = !preset_enable;





























	mutex_lock(&priv->lock);





























	priv->preset_enable[chan->channel] = preset_enable;































	ior_cfg = priv->ab_enable[chan->channel] |









@@ -301,6 +329,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,













	/* Load I/O control configuration to Input / Output Control Register */















	outb(QUAD8_CTR_IOR | ior_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return len;















}


























@@ -358,6 +388,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev,













	unsigned int mode_cfg = cnt_mode << 1;















	const int base_offset = priv->base + 2 * chan->channel + 1;





























	mutex_lock(&priv->lock);





























	priv->count_mode[chan->channel] = cnt_mode;































	/* Add quadrature mode configuration */









@@ -367,6 +399,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev,













	/* Load mode configuration to Counter Mode Register */















	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -394,19 +428,26 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,













	const struct iio_chan_spec *chan, unsigned int synchronous_mode)















{















	struct quad8_iio *const priv = iio_priv(indio_dev);













	const unsigned int idr_cfg = synchronous_mode |













		priv->index_polarity[chan->channel] << 1;















	const int base_offset = priv->base + 2 * chan->channel + 1;













	unsigned int idr_cfg = synchronous_mode;



























	mutex_lock(&priv->lock);



























	idr_cfg |= priv->index_polarity[chan->channel] << 1;































	/* Index function must be non-synchronous in non-quadrature mode */













	if (synchronous_mode && !priv->quadrature_mode[chan->channel])













	if (synchronous_mode && !priv->quadrature_mode[chan->channel]) {













		mutex_unlock(&priv->lock);















		return -EINVAL;













	}































	priv->synchronous_mode[chan->channel] = synchronous_mode;































	/* Load Index Control configuration to Index Control Register */















	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -434,8 +475,12 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev,













	const struct iio_chan_spec *chan, unsigned int quadrature_mode)















{















	struct quad8_iio *const priv = iio_priv(indio_dev);













	unsigned int mode_cfg = priv->count_mode[chan->channel] << 1;















	const int base_offset = priv->base + 2 * chan->channel + 1;













	unsigned int mode_cfg;



























	mutex_lock(&priv->lock);



























	mode_cfg = priv->count_mode[chan->channel] << 1;































	if (quadrature_mode)















		mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;









@@ -453,6 +498,8 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev,













	/* Load mode configuration to Counter Mode Register */















	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -480,15 +527,20 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev,













	const struct iio_chan_spec *chan, unsigned int index_polarity)















{















	struct quad8_iio *const priv = iio_priv(indio_dev);













	const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] |













		index_polarity << 1;















	const int base_offset = priv->base + 2 * chan->channel + 1;













	unsigned int idr_cfg = index_polarity << 1;



























	mutex_lock(&priv->lock);



























	idr_cfg |= priv->synchronous_mode[chan->channel];































	priv->index_polarity[chan->channel] = index_polarity;































	/* Load Index Control configuration to Index Control Register */















	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -589,7 +641,7 @@ static int quad8_signal_read(struct counter_device *counter,













static int quad8_count_read(struct counter_device *counter,















	struct counter_count *count, unsigned long *val)















{













	const struct quad8_iio *const priv = counter->priv;













	struct quad8_iio *const priv = counter->priv;















	const int base_offset = priv->base + 2 * count->id;















	unsigned int flags;















	unsigned int borrow;









@@ -603,6 +655,8 @@ static int quad8_count_read(struct counter_device *counter,













	/* Borrow XOR Carry effectively doubles count range */















	*val = (unsigned long)(borrow ^ carry) << 24;





























	mutex_lock(&priv->lock);





























	/* Reset Byte Pointer; transfer Counter to Output Latch */















	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,















	     base_offset + 1);









@@ -610,13 +664,15 @@ static int quad8_count_read(struct counter_device *counter,













	for (i = 0; i < 3; i++)















		*val |= (unsigned long)inb(base_offset) << (8 * i);





























	mutex_unlock(&priv->lock);





























	return 0;















}































static int quad8_count_write(struct counter_device *counter,















	struct counter_count *count, unsigned long val)















{













	const struct quad8_iio *const priv = counter->priv;













	struct quad8_iio *const priv = counter->priv;















	const int base_offset = priv->base + 2 * count->id;















	int i;

























@@ -624,6 +680,8 @@ static int quad8_count_write(struct counter_device *counter,













	if (val > 0xFFFFFF)















		return -EINVAL;





























	mutex_lock(&priv->lock);





























	/* Reset Byte Pointer */















	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);

























@@ -647,6 +705,8 @@ static int quad8_count_write(struct counter_device *counter,













	/* Reset Error flag */















	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);





























	mutex_unlock(&priv->lock);





























	return 0;















}

























@@ -667,13 +727,13 @@ static enum counter_count_function quad8_count_functions_list[] = {













static int quad8_function_get(struct counter_device *counter,















	struct counter_count *count, size_t *function)















{













	const struct quad8_iio *const priv = counter->priv;













	struct quad8_iio *const priv = counter->priv;















	const int id = count->id;













	const unsigned int quadrature_mode = priv->quadrature_mode[id];













	const unsigned int scale = priv->quadrature_scale[id];





























	if (quadrature_mode)













		switch (scale) {













	mutex_lock(&priv->lock);



























	if (priv->quadrature_mode[id])













		switch (priv->quadrature_scale[id]) {















		case 0:















			*function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;















			break;









@@ -687,6 +747,8 @@ static int quad8_function_get(struct counter_device *counter,













	else















		*function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;





























	mutex_unlock(&priv->lock);





























	return 0;















}

























@@ -697,10 +759,15 @@ static int quad8_function_set(struct counter_device *counter,













	const int id = count->id;















	unsigned int *const quadrature_mode = priv->quadrature_mode + id;















	unsigned int *const scale = priv->quadrature_scale + id;













	unsigned int mode_cfg = priv->count_mode[id] << 1;















	unsigned int *const synchronous_mode = priv->synchronous_mode + id;













	const unsigned int idr_cfg = priv->index_polarity[id] << 1;















	const int base_offset = priv->base + 2 * id + 1;













	unsigned int mode_cfg;













	unsigned int idr_cfg;



























	mutex_lock(&priv->lock);



























	mode_cfg = priv->count_mode[id] << 1;













	idr_cfg = priv->index_polarity[id] << 1;































	if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {















		*quadrature_mode = 0;










@@ -736,6 +803,8 @@ static int quad8_function_set(struct counter_device *counter,













	/* Load mode configuration to Counter Mode Register */















	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -852,15 +921,20 @@ static int quad8_index_polarity_set(struct counter_device *counter,













{















	struct quad8_iio *const priv = counter->priv;















	const size_t channel_id = signal->id - 16;













	const unsigned int idr_cfg = priv->synchronous_mode[channel_id] |













		index_polarity << 1;















	const int base_offset = priv->base + 2 * channel_id + 1;













	unsigned int idr_cfg = index_polarity << 1;



























	mutex_lock(&priv->lock);



























	idr_cfg |= priv->synchronous_mode[channel_id];































	priv->index_polarity[channel_id] = index_polarity;































	/* Load Index Control configuration to Index Control Register */















	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}

























@@ -887,19 +961,26 @@ static int quad8_synchronous_mode_set(struct counter_device *counter,













{















	struct quad8_iio *const priv = counter->priv;















	const size_t channel_id = signal->id - 16;













	const unsigned int idr_cfg = synchronous_mode |













		priv->index_polarity[channel_id] << 1;















	const int base_offset = priv->base + 2 * channel_id + 1;













	unsigned int idr_cfg = synchronous_mode;



























	mutex_lock(&priv->lock);



























	idr_cfg |= priv->index_polarity[channel_id] << 1;































	/* Index function must be non-synchronous in non-quadrature mode */













	if (synchronous_mode && !priv->quadrature_mode[channel_id])













	if (synchronous_mode && !priv->quadrature_mode[channel_id]) {













		mutex_unlock(&priv->lock);















		return -EINVAL;













	}































	priv->synchronous_mode[channel_id] = synchronous_mode;































	/* Load Index Control configuration to Index Control Register */















	outb(QUAD8_CTR_IDR | idr_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -964,6 +1045,8 @@ static int quad8_count_mode_set(struct counter_device *counter,













		break;















	}





























	mutex_lock(&priv->lock);





























	priv->count_mode[count->id] = cnt_mode;































	/* Set count mode configuration value */









@@ -976,6 +1059,8 @@ static int quad8_count_mode_set(struct counter_device *counter,













	/* Load mode configuration to Counter Mode Register */















	outb(QUAD8_CTR_CMR | mode_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return 0;















}


























@@ -1017,6 +1102,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter,













	if (err)















		return err;





























	mutex_lock(&priv->lock);





























	priv->ab_enable[count->id] = ab_enable;































	ior_cfg = ab_enable | priv->preset_enable[count->id] << 1;









@@ -1024,6 +1111,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter,













	/* Load I/O control configuration */















	outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1);





























	mutex_unlock(&priv->lock);





























	return len;















}


























@@ -1052,14 +1141,28 @@ static ssize_t quad8_count_preset_read(struct counter_device *counter,













	return sprintf(buf, "%u\n", priv->preset[count->id]);















}





























static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id,













		unsigned int preset)













{













	const unsigned int base_offset = quad8iio->base + 2 * id;













	int i;



























	quad8iio->preset[id] = preset;



























	/* Reset Byte Pointer */













	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);



























	/* Set Preset Register */













	for (i = 0; i < 3; i++)













		outb(preset >> (8 * i), base_offset);













}





























static ssize_t quad8_count_preset_write(struct counter_device *counter,















	struct counter_count *count, void *private, const char *buf, size_t len)















{















	struct quad8_iio *const priv = counter->priv;













	const int base_offset = priv->base + 2 * count->id;















	unsigned int preset;















	int ret;













	int i;































	ret = kstrtouint(buf, 0, &preset);















	if (ret)









@@ -1069,14 +1172,11 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter,













	if (preset > 0xFFFFFF)















		return -EINVAL;





























	priv->preset[count->id] = preset;













	mutex_lock(&priv->lock);





























	/* Reset Byte Pointer */













	outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);













	quad8_preset_register_set(priv, count->id, preset);





























	/* Set Preset Register */













	for (i = 0; i < 3; i++)













		outb(preset >> (8 * i), base_offset);













	mutex_unlock(&priv->lock);































	return len;















}









@@ -1084,15 +1184,20 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter,













static ssize_t quad8_count_ceiling_read(struct counter_device *counter,















	struct counter_count *count, void *private, char *buf)















{













	const struct quad8_iio *const priv = counter->priv;













	struct quad8_iio *const priv = counter->priv;



























	mutex_lock(&priv->lock);































	/* Range Limit and Modulo-N count modes use preset value as ceiling */















	switch (priv->count_mode[count->id]) {















	case 1:















	case 3:













		return quad8_count_preset_read(counter, count, private, buf);













		mutex_unlock(&priv->lock);













		return sprintf(buf, "%u\n", priv->preset[count->id]);















	}





























	mutex_unlock(&priv->lock);





























	/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */















	return sprintf(buf, "33554431\n");















}









@@ -1101,15 +1206,29 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter,













	struct counter_count *count, void *private, const char *buf, size_t len)















{















	struct quad8_iio *const priv = counter->priv;













	unsigned int ceiling;













	int ret;



























	ret = kstrtouint(buf, 0, &ceiling);













	if (ret)













		return ret;



























	/* Only 24-bit values are supported */













	if (ceiling > 0xFFFFFF)













		return -EINVAL;



























	mutex_lock(&priv->lock);































	/* Range Limit and Modulo-N count modes use preset value as ceiling */















	switch (priv->count_mode[count->id]) {















	case 1:















	case 3:













		return quad8_count_preset_write(counter, count, private, buf,













						len);













		quad8_preset_register_set(priv, count->id, ceiling);













		break;















	}





























	mutex_unlock(&priv->lock);





























	return len;















}


























@@ -1137,6 +1256,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter,













	/* Preset enable is active low in Input/Output Control register */















	preset_enable = !preset_enable;





























	mutex_lock(&priv->lock);





























	priv->preset_enable[count->id] = preset_enable;































	ior_cfg = priv->ab_enable[count->id] | (unsigned int)preset_enable << 1;









@@ -1144,6 +1265,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter,













	/* Load I/O control configuration to Input / Output Control Register */















	outb(QUAD8_CTR_IOR | ior_cfg, base_offset);





























	mutex_unlock(&priv->lock);





























	return len;















}


























@@ -1429,6 +1552,9 @@ static int quad8_probe(struct device *dev, unsigned int id)













	quad8iio->counter.priv = quad8iio;















	quad8iio->base = base[id];





























	/* Initialize mutex */













	mutex_init(&quad8iio->lock);





























	/* Reset all counters and disable interrupt function */















	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);















	/* Set initial configuration for all counters */

































drivers/iio/adc/ad7192.c



+47
−16






























Original line number
Diff line number
Diff line








@@ -125,10 +125,10 @@













#define AD7193_CH_AINCOM	0x600 /* AINCOM - AINCOM */































/* ID Register Bit Designations (AD7192_REG_ID) */













#define ID_AD7190		0x4













#define ID_AD7192		0x0













#define ID_AD7193		0x2













#define ID_AD7195		0x6













#define CHIPID_AD7190		0x4













#define CHIPID_AD7192		0x0













#define CHIPID_AD7193		0x2













#define CHIPID_AD7195		0x6















#define AD7192_ID_MASK		0x0F































/* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */










@@ -161,7 +161,20 @@ enum {













	AD7192_SYSCALIB_FULL_SCALE,















};





























enum {













	ID_AD7190,













	ID_AD7192,













	ID_AD7193,













	ID_AD7195,













};



























struct ad7192_chip_info {













	unsigned int			chip_id;













	const char			*name;













};





























struct ad7192_state {













	const struct ad7192_chip_info	*chip_info;















	struct regulator		*avdd;















	struct regulator		*dvdd;















	struct clk			*mclk;









@@ -172,7 +185,6 @@ struct ad7192_state {













	u32				conf;















	u32				scale_avail[8][2];















	u8				gpocon;













	u8				devid;















	u8				clock_sel;















	struct mutex			lock;	/* protect sensor state */















	u8				syscalib_mode[8];










@@ -348,7 +360,7 @@ static int ad7192_setup(struct ad7192_state *st, struct device_node *np)





























	id &= AD7192_ID_MASK;





























	if (id != st->devid)













	if (id != st->chip_info->chip_id)















		dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n",















			 id);

























@@ -363,7 +375,7 @@ static int ad7192_setup(struct ad7192_state *st, struct device_node *np)













		st->mode |= AD7192_MODE_REJ60;































	refin2_en = of_property_read_bool(np, "adi,refin2-pins-enable");













	if (refin2_en && st->devid != ID_AD7195)













	if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195)















		st->conf |= AD7192_CONF_REFSEL;































	st->conf &= ~AD7192_CONF_CHOP;










@@ -859,12 +871,31 @@ static const struct iio_chan_spec ad7193_channels[] = {













	IIO_CHAN_SOFT_TIMESTAMP(14),















};





























static const struct ad7192_chip_info ad7192_chip_info_tbl[] = {













	[ID_AD7190] = {













		.chip_id = CHIPID_AD7190,













		.name = "ad7190",













	},













	[ID_AD7192] = {













		.chip_id = CHIPID_AD7192,













		.name = "ad7192",













	},













	[ID_AD7193] = {













		.chip_id = CHIPID_AD7193,













		.name = "ad7193",













	},













	[ID_AD7195] = {













		.chip_id = CHIPID_AD7195,













		.name = "ad7195",













	},













};





























static int ad7192_channels_config(struct iio_dev *indio_dev)















{















	struct ad7192_state *st = iio_priv(indio_dev);





























	switch (st->devid) {













	case ID_AD7193:













	switch (st->chip_info->chip_id) {













	case CHIPID_AD7193:















		indio_dev->channels = ad7193_channels;















		indio_dev->num_channels = ARRAY_SIZE(ad7193_channels);















		break;









@@ -878,10 +909,10 @@ static int ad7192_channels_config(struct iio_dev *indio_dev)













}































static const struct of_device_id ad7192_of_match[] = {













	{ .compatible = "adi,ad7190", .data = (void *)ID_AD7190 },













	{ .compatible = "adi,ad7192", .data = (void *)ID_AD7192 },













	{ .compatible = "adi,ad7193", .data = (void *)ID_AD7193 },













	{ .compatible = "adi,ad7195", .data = (void *)ID_AD7195 },













	{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },













	{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },













	{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },













	{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },















	{}















};















MODULE_DEVICE_TABLE(of, ad7192_of_match);










@@ -938,16 +969,16 @@ static int ad7192_probe(struct spi_device *spi)













	}































	spi_set_drvdata(spi, indio_dev);













	st->devid = (unsigned long)of_device_get_match_data(&spi->dev);













	st->chip_info = of_device_get_match_data(&spi->dev);















	indio_dev->dev.parent = &spi->dev;













	indio_dev->name = spi_get_device_id(spi)->name;













	indio_dev->name = st->chip_info->name;















	indio_dev->modes = INDIO_DIRECT_MODE;































	ret = ad7192_channels_config(indio_dev);















	if (ret < 0)















		goto error_disable_dvdd;





























	if (st->devid == ID_AD7195)













	if (st->chip_info->chip_id == CHIPID_AD7195)















		indio_dev->info = &ad7195_info;















	else















		indio_dev->info = &ad7192_info;

































drivers/iio/adc/ad7793.c



+1
−1






























Original line number
Diff line number
Diff line








@@ -542,7 +542,7 @@ static const struct iio_info ad7797_info = {













	.read_raw = &ad7793_read_raw,















	.write_raw = &ad7793_write_raw,















	.write_raw_get_fmt = &ad7793_write_raw_get_fmt,













	.attrs = &ad7793_attribute_group,













	.attrs = &ad7797_attribute_group,















	.validate_trigger = ad_sd_validate_trigger,















};

























































































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