Commit ed93a666 authored by Thierry Reding's avatar Thierry Reding
Browse files

arm64: tegra: Add SOR0_OUT clock on Tegra210 



This clock was not previously used because it is a fixed clock. However,
adding it here allows operating systems to deal with SOR0 the same way
as SOR1.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent b7450f16

arch/arm64/boot/dts/nvidia/tegra210.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -254,10 +254,11 @@ 
			reg = <0x0 0x54540000 0x0 0x00040000>;

			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA210_CLK_SOR0>,

				 <&tegra_car TEGRA210_CLK_SOR0_OUT>,

				 <&tegra_car TEGRA210_CLK_PLL_D_OUT0>,

				 <&tegra_car TEGRA210_CLK_PLL_DP>,

				 <&tegra_car TEGRA210_CLK_SOR_SAFE>;

			clock-names = "sor", "parent", "dp", "safe";

			clock-names = "sor", "out", "parent", "dp", "safe";

			resets = <&tegra_car 182>;

			reset-names = "sor";

			pinctrl-0 = <&state_dpaux_aux>;

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