Merge tag 'media/v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

What:		/sys/kernel/debug/cec/*/error-inj

Date:		March 2018

Contact:	Hans Verkuil <hans.verkuil@cisco.com>

Contact:	Hans Verkuil <hverkuil-cisco@xs4all.nl>

Description:

The CEC Framework allows for CEC error injection commands through

Device-tree bindings for the Allegro DVT video IP codecs present in the Xilinx

ZynqMP SoC. The IP core may either be a H.264/H.265 encoder or H.264/H.265

decoder ip core.

Each actual codec engines is controlled by a microcontroller (MCU). Host

software uses a provided mailbox interface to communicate with the MCU. The

MCU share an interrupt.

Required properties:

  - compatible: value should be one of the following

    "allegro,al5e-1.1", "allegro,al5e": encoder IP core

    "allegro,al5d-1.1", "allegro,al5d": decoder IP core

  - reg: base and length of the memory mapped register region and base and

    length of the memory mapped sram

  - reg-names: must include "regs" and "sram"

  - interrupts: shared interrupt from the MCUs to the processing system

  - clocks: must contain an entry for each entry in clock-names

  - clock-names: must include "core_clk", "mcu_clk", "m_axi_core_aclk",

    "m_axi_mcu_aclk", "s_axi_lite_aclk"

Example:

	al5e: video-codec@a0009000 {

		compatible = "allegro,al5e-1.1", "allegro,al5e";

		reg = <0 0xa0009000 0 0x1000>,

		      <0 0xa0000000 0 0x8000>;

		reg-names = "regs", "sram";

		interrupts = <0 96 4>;

		clocks = <&xlnx_vcu 0>, <&xlnx_vcu 1>,

			 <&clkc 71>, <&clkc 71>, <&clkc 71>;

		clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",

			      "m_axi_mcu_aclk", "s_axi_lite_aclk"

	};

	al5d: video-codec@a0029000 {

		compatible = "allegro,al5d-1.1", "allegro,al5d";

		reg = <0 0xa0029000 0 0x1000>,

		      <0 0xa0020000 0 0x8000>;

		reg-names = "regs", "sram";

		interrupts = <0 96 4>;

		clocks = <&xlnx_vcu 2>, <&xlnx_vcu 3>,

			 <&clkc 71>, <&clkc 71>, <&clkc 71>;

		clock-names = "core_clk", "mcu_clk", "m_axi_core_aclk",

			      "m_axi_mcu_aclk", "s_axi_lite_aclk"

	};

Amlogic Video Decoder

================================

The video decoding IP lies within the DOS memory region,

except for the hardware bitstream parser that makes use of an undocumented

region.

It makes use of the following blocks:

- ESPARSER is a bitstream parser that outputs to a VIFIFO. Further VDEC blocks

then feed from this VIFIFO.

- VDEC_1 can decode MPEG-1, MPEG-2, MPEG-4 part 2, MJPEG, H.263, H.264, VC-1.

- VDEC_HEVC can decode HEVC and VP9.

Both VDEC_1 and VDEC_HEVC share the "vdec" IRQ and as such cannot run

concurrently.

Device Tree Bindings:

---------------------

VDEC: Video Decoder

--------------------------

Required properties:

- compatible: value should be different for each SoC family as :

	- GXBB (S905) : "amlogic,gxbb-vdec"

	- GXL (S905X, S905D) : "amlogic,gxl-vdec"

	- GXM (S912) : "amlogic,gxm-vdec"

- reg: base address and size of he following memory-mapped regions :

	- dos

	- esparser

- reg-names: should contain the names of the previous memory regions

- interrupts: should contain the following IRQs:

	- vdec

	- esparser

- interrupt-names: should contain the names of the previous interrupts

- amlogic,ao-sysctrl: should point to the AOBUS sysctrl node

- amlogic,canvas: should point to a canvas provider node

- clocks: should contain the following clocks :

	- dos_parser

	- dos

	- vdec_1

	- vdec_hevc

- clock-names: should contain the names of the previous clocks

- resets: should contain the parser reset

- reset-names: should be "esparser"

Example:

vdec: video-decoder@c8820000 {

	compatible = "amlogic,gxbb-vdec";

	reg = <0x0 0xc8820000 0x0 0x10000>,

	      <0x0 0xc110a580 0x0 0xe4>;

	reg-names = "dos", "esparser";

	interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,

		     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;

	interrupt-names = "vdec", "esparser";

	amlogic,ao-sysctrl = <&sysctrl_AO>;

	amlogic,canvas = <&canvas>;

	clocks = <&clkc CLKID_DOS_PARSER>,

		 <&clkc CLKID_DOS>,

		 <&clkc CLKID_VDEC_1>,

		 <&clkc CLKID_VDEC_HEVC>;

	clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";

	resets = <&reset RESET_PARSER>;

	reset-names = "esparser";

};

- interrupts    : should contain CSI interrupt;

- clocks        : list of clock specifiers, see

        Documentation/devicetree/bindings/clock/clock-bindings.txt for details;

- clock-names   : must contain "axi", "mclk" and "dcic" entries, matching

                 entries in the clock property;

- clock-names   : must contain "mclk";

The device node shall contain one 'port' child node with one child 'endpoint'

node, according to the bindings defined in:

                        compatible = "fsl,imx7-csi";

                        reg = <0x30710000 0x10000>;

                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

                        clocks = <&clks IMX7D_CLK_DUMMY>,

                                        <&clks IMX7D_CSI_MCLK_ROOT_CLK>,

                                        <&clks IMX7D_CLK_DUMMY>;

                        clock-names = "axi", "mclk", "dcic";

                        clocks = <&clks IMX7D_CSI_MCLK_ROOT_CLK>;

                        clock-names = "mclk";

                        port {

                                csi_from_csi_mux: endpoint {

Marvell MMP2 camera host interface

Required properties:

 - compatible: Should be "marvell,mmp2-ccic".

 - reg: Register base and size.

 - interrupts: The interrupt number.

 - #clock-cells: Must be 0.

Optional properties:

 - clocks: Reference to the input clock as specified by

           Documentation/devicetree/bindings/clock/clock-bindings.txt.

 - clock-names: Names of the clocks used; "axi" for the AXI bus interface,

                "func" for the peripheral clock and "phy" for the parallel

                video bus interface.

 - clock-output-names: Optional clock source for sensors. Shall be "mclk".

Required subnodes:

 - port: The parallel bus interface port with a single endpoint linked to

         the sensor's endpoint as described in

         Documentation/devicetree/bindings/media/video-interfaces.txt.

Required endpoint properties:

 - bus-type: data bus type, <5> or <6> for Parallel or Bt.656 respectively

 - pclk-sample: pixel clock polarity

 - hsync-active: horizontal synchronization polarity (only required for

   parallel bus)

 - vsync-active: vertical synchronization polarity (only required for

   parallel bus)

Example:

	camera0: camera@d420a000 {

		compatible = "marvell,mmp2-ccic";

		reg = <0xd420a000 0x800>;

		interrupts = <42>;

		clocks = <&soc_clocks MMP2_CLK_CCIC0>;

		clock-names = "axi";

		#clock-cells = <0>;

		clock-output-names = "mclk";

		port {

			camera0_0: endpoint {

				remote-endpoint = <&ov7670_0>;

                                bus-type = <5>;      /* Parallel */

                                hsync-active = <1>;  /* Active high */

                                vsync-active = <1>;  /* Active high */

                                pclk-sample = <0>;   /* Falling */

			};

		};

	};