Commit ed2a8dd2 authored May 02, 2019 by Dmitry Osipenko Committed by MyungJoo Ham Aug 24, 2019

PM / devfreq: tegra: Replace write memory barrier with the read barrier



The write memory barrier isn't needed because the BUS buffer is flushed
by read after write that happens after the removed wmb(), we will also
use readl() instead of the relaxed version to ensure that read is indeed
completed.

Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>

parent efe9043d

drivers/devfreq/tegra-devfreq.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -231,8 +231,7 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
		static void actmon_write_barrier(struct tegra_devfreq *tegra)
		{
		/* ensure the update has reached the ACTMON */
		wmb();
		actmon_readl(tegra, ACTMON_GLB_STATUS);
		readl(tegra->regs + ACTMON_GLB_STATUS);
		}

		static void actmon_isr_device(struct tegra_devfreq *tegra,

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