Commit ed279529 authored Jul 09, 2020 by Enric Balletbo i Serra Committed by Chanwoo Choi Jul 30, 2020

dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle



The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

parent 24948479

Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -18,6 +18,8 @@ Optional properties:
		format depends on the interrupt controller.
		It should be a DCF interrupt. When DDR DVFS finishes
		a DCF interrupt is triggered.
		- rockchip,pmu: Phandle to the syscon managing the "PMU general register
		files".

		Following properties relate to DDR timing:

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