drm/i915/gt: Do not restore invalid RS state (ecfcd2da) · Commits · 戴 / test

drivers/gpu/drm/i915/gt/intel_ring_submission.c

+11 −13

Original line number	Diff line number	Diff line
		@@ -1408,14 +1408,6 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
		int len;
		u32 *cs;

		flags \|= MI_MM_SPACE_GTT;
		if (IS_HASWELL(i915))
		/* These flags are for resource streamer on HSW+ */
		flags \|= HSW_MI_RS_SAVE_STATE_EN \| HSW_MI_RS_RESTORE_STATE_EN;
		else
		/* We need to save the extended state for powersaving modes */
		flags \|= MI_SAVE_EXT_STATE_EN \| MI_RESTORE_EXT_STATE_EN;

		len = 4;
		if (IS_GEN(i915, 7))
		len += 2 + (num_engines ? 4 * num_engines + 6 : 0);
		@@ -1607,15 +1599,21 @@ static int switch_context(struct i915_request *rq)
		return ret;

		if (ce->state) {
		u32 hw_flags;
		u32 flags;

		GEM_BUG_ON(rq->engine->id != RCS0);

		hw_flags = 0;
		if (!test_bit(CONTEXT_VALID_BIT, &ce->flags))
		hw_flags = MI_RESTORE_INHIBIT;
		/* For resource streamer on HSW+ and power context elsewhere */
		BUILD_BUG_ON(HSW_MI_RS_SAVE_STATE_EN != MI_SAVE_EXT_STATE_EN);
		BUILD_BUG_ON(HSW_MI_RS_RESTORE_STATE_EN != MI_RESTORE_EXT_STATE_EN);

		flags = MI_SAVE_EXT_STATE_EN \| MI_MM_SPACE_GTT;
		if (test_bit(CONTEXT_VALID_BIT, &ce->flags))
		flags \|= MI_RESTORE_EXT_STATE_EN;
		else
		flags \|= MI_RESTORE_INHIBIT;

		ret = mi_set_context(rq, hw_flags);
		ret = mi_set_context(rq, flags);
		if (ret)
		return ret;
		}