Commit ec6754a7 authored by Jean-Christophe PLAGNIOL-VILLARD's avatar Jean-Christophe PLAGNIOL-VILLARD
Browse files

arm: at91: dt: at91sam9 add serial pinctrl support 



Set the dbgu pinctrl config by default as we have only one possible config
For other uart set the rxd/txd by default.

For at91sam9x5ek create soc based dts as we need to include specific soc dtsi.

Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
parent 5314ec8e

arch/arm/boot/dts/Makefile

+28 −16
Original line number Diff line number Diff line 
ifeq ($(CONFIG_OF),y)



dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \

	at91sam9263ek.dtb \

	at91sam9g20ek_2mmc.dtb \

	at91sam9g20ek.dtb \

	at91sam9g25ek.dtb \

	at91sam9m10g45ek.dtb \

	at91sam9n12ek.dtb \

	ethernut5.dtb \

	evk-pro3.dtb \

	kizbox.dtb \

	tny_a9260.dtb \

	tny_a9263.dtb \

	tny_a9g20.dtb \

	usb_a9260.dtb \

	usb_a9263.dtb \

	usb_a9g20.dtb

# Keep at91 dtb files sorted alphabetically for each SoC

# sam9260

dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb

dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb

dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb

dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb

dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb

# sam9263

dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb

dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb

dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb

# sam9g20

dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb

dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb

dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb

dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb

dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb

# sam9g45

dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb

# sam9n12

dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb

# sam9x5

dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb

dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb

dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb

dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb

dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb



dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb

dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \

	dove-cubox.dtb \

arch/arm/boot/dts/at91sam9260.dtsi

+109 −0
Original line number Diff line number Diff line
@@ -112,6 +112,101 @@ 
				      >;



				/* shared pinctrl settings */

				dbgu {

					pinctrl_dbgu: dbgu-0 {

						atmel,pins =

							<1 14 0x1 0x0	/* PB14 periph A */

							 1 15 0x1 0x1>;	/* PB15 periph with pullup */

					};

				};



				uart0 {

					pinctrl_uart0: uart0-0 {

						atmel,pins =

							<1 4 0x1 0x0	/* PB4 periph A */

							 1 5 0x1 0x0>;	/* PB5 periph A */

					};



					pinctrl_uart0_rts_cts: uart0_rts_cts-0 {

						atmel,pins =

							<1 26 0x1 0x0	/* PB26 periph A */

							 1 27 0x1 0x0>;	/* PB27 periph A */

					};



					pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {

						atmel,pins =

							<1 24 0x1 0x0	/* PB24 periph A */

							 1 22 0x1 0x0>;	/* PB22 periph A */

					};



					pinctrl_uart0_dcd: uart0_dcd-0 {

						atmel,pins =

							<1 23 0x1 0x0>;	/* PB23 periph A */

					};



					pinctrl_uart0_ri: uart0_ri-0 {

						atmel,pins =

							<1 25 0x1 0x0>;	/* PB25 periph A */

					};

				};



				uart1 {

					pinctrl_uart1: uart1-0 {

						atmel,pins =

							<2 6 0x1 0x1	/* PB6 periph A with pullup */

							 2 7 0x1 0x0>;	/* PB7 periph A */

					};



					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {

						atmel,pins =

							<1 28 0x1 0x0	/* PB28 periph A */

							 1 29 0x1 0x0>;	/* PB29 periph A */

					};

				};



				uart2 {

					pinctrl_uart2: uart2-0 {

						atmel,pins =

							<1 8 0x1 0x1	/* PB8 periph A with pullup */

							 1 9 0x1 0x0>;	/* PB9 periph A */

					};



					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {

						atmel,pins =

							<0 4 0x1 0x0	/* PA4 periph A */

							 0 5 0x1 0x0>;	/* PA5 periph A */

					};

				};



				uart3 {

					pinctrl_uart3: uart3-0 {

						atmel,pins =

							<2 10 0x1 0x1	/* PB10 periph A with pullup */

							 2 11 0x1 0x0>;	/* PB11 periph A */

					};



					pinctrl_uart3_rts_cts: uart3_rts_cts-0 {

						atmel,pins =

							<3 8 0x2 0x0	/* PB8 periph B */

							 3 10 0x2 0x0>;	/* PB10 periph B */

					};

				};



				uart4 {

					pinctrl_uart4: uart4-0 {

						atmel,pins =

							<0 31 0x2 0x1	/* PA31 periph B with pullup */

							 0 30 0x2 0x0>;	/* PA30 periph B */

					};

				};



				uart5 {

					pinctrl_uart5: uart5-0 {

						atmel,pins =

							<2 12 0x1 0x1	/* PB12 periph A with pullup */

							 2 13 0x1 0x0>;	/* PB13 periph A */

					};

				};



				pioA: gpio@fffff400 {

					compatible = "atmel,at91rm9200-gpio";
@@ -148,6 +243,8 @@ 
				compatible = "atmel,at91sam9260-usart";

				reg = <0xfffff200 0x200>;

				interrupts = <1 4 7>;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_dbgu>;

				status = "disabled";

			};
@@ -157,6 +254,8 @@ 
				interrupts = <6 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart0>;

				status = "disabled";

			};
@@ -166,6 +265,8 @@ 
				interrupts = <7 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart1>;

				status = "disabled";

			};
@@ -175,6 +276,8 @@ 
				interrupts = <8 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart2>;

				status = "disabled";

			};
@@ -184,6 +287,8 @@ 
				interrupts = <23 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart3>;

				status = "disabled";

			};
@@ -193,6 +298,8 @@ 
				interrupts = <24 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart4>;

				status = "disabled";

			};
@@ -202,6 +309,8 @@ 
				interrupts = <25 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart5>;

				status = "disabled";

			};

arch/arm/boot/dts/at91sam9263.dtsi

+57 −0
Original line number Diff line number Diff line
@@ -105,6 +105,55 @@ 
				      >;



				/* shared pinctrl settings */

				dbgu {

					pinctrl_dbgu: dbgu-0 {

						atmel,pins =

							<2 30 0x1 0x0	/* PC30 periph A */

							 2 31 0x1 0x1>;	/* PC31 periph with pullup */

					};

				};



				uart0 {

					pinctrl_uart0: uart0-0 {

						atmel,pins =

							<0 26 0x1 0x1	/* PA26 periph A with pullup */

							 0 27 0x1 0x0>;	/* PA27 periph A */

					};



					pinctrl_uart0_rts_cts: uart0_rts_cts-0 {

						atmel,pins =

							<0 28 0x1 0x0	/* PA28 periph A */

							 0 29 0x1 0x0>;	/* PA29 periph A */

					};

				};



				uart1 {

					pinctrl_uart1: uart1-0 {

						atmel,pins =

							<3 0 0x1 0x1	/* PD0 periph A with pullup */

							 3 1 0x1 0x0>;	/* PD1 periph A */

					};



					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {

						atmel,pins =

							<3 7 0x2 0x0	/* PD7 periph B */

							 3 8 0x2 0x0>;	/* PD8 periph B */

					};

				};



				uart2 {

					pinctrl_uart2: uart2-0 {

						atmel,pins =

							<3 2 0x1 0x1	/* PD2 periph A with pullup */

							 3 3 0x1 0x0>;	/* PD3 periph A */

					};



					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {

						atmel,pins =

							<3 5 0x2 0x0	/* PD5 periph B */

							 4 6 0x2 0x0>;	/* PD6 periph B */

					};

				};



				pioA: gpio@fffff200 {

					compatible = "atmel,at91rm9200-gpio";
@@ -161,6 +210,8 @@ 
				compatible = "atmel,at91sam9260-usart";

				reg = <0xffffee00 0x200>;

				interrupts = <1 4 7>;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_dbgu>;

				status = "disabled";

			};
@@ -170,6 +221,8 @@ 
				interrupts = <7 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart0>;

				status = "disabled";

			};
@@ -179,6 +232,8 @@ 
				interrupts = <8 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart1>;

				status = "disabled";

			};
@@ -188,6 +243,8 @@ 
				interrupts = <9 4 5>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart2>;

				status = "disabled";

			};

arch/arm/boot/dts/at91sam9g15.dtsi

0 → 100644
+28 −0
Original line number Diff line number Diff line 
/*

 * at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC

 *

 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

 *

 * Licensed under GPLv2.

 */



/include/ "at91sam9x5.dtsi"



/ {

	model = "Atmel AT91SAM9G15 SoC";

	compatible = "atmel, at91sam9g15, atmel,at91sam9x5";



	ahb {

		apb {

			pinctrl@fffff400 {

				atmel,mux-mask = <

				      /*    A         B          C     */

				       0xffffffff 0xffe0399f 0x00000000  /* pioA */

				       0x00040000 0x00047e3f 0x00000000  /* pioB */

				       0xfdffffff 0x00000000 0xb83fffff  /* pioC */

				       0x003fffff 0x003f8000 0x00000000  /* pioD */

				      >;

			};

		};

	};

};

arch/arm/boot/dts/at91sam9g15ek.dts

0 → 100644
+16 −0
Original line number Diff line number Diff line 
/*

 * at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */

/dts-v1/;

/include/ "at91sam9g15.dtsi"

/include/ "at91sam9x5ek.dtsi"



/ {

	model = "Atmel AT91SAM9G25-EK";

	compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";

};

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