Commit ec498f8e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt 

Pull "STi DT updates for v3.19, round 2" from Maxime Coquelin:

Highlights:
-----------
 - Refactor STiH407 SoC and board to add STiH410 SoC support
 - Add USB support to STiH416 SoC

* tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti

:
  ARM: STi: DT: STiH416: Change miphy356 node name to phy@fe382000
  ARM: STi: DT: STih407: STih410: Add clk_ignore_unused to kernel bootargs
  ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support.
  ARM: STi: DT: STih407: Abstract common dt nodes into shared files.
  ARM: STi: DT: STiH410: Add pinctl config for usb controllers.
  ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks
  ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers.
  ARM: STi: DT: STiH416: Add DT node for the stih415/6 usb2 phy
  ARM: STi: DT: STiH416: Add pinctl setup for usb controllers.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3af1fda3 3ece2c2b

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -420,6 +420,7 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ 
	spear320-hmi.dtb

dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb

dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \

	stih410-b2120.dtb \

	stih415-b2000.dtb \

	stih415-b2020.dtb \

	stih416-b2000.dtb \

arch/arm/boot/dts/stih407-b2120.dts

+4 −51
Original line number Diff line number Diff line
@@ -7,13 +7,15 @@ 
 * published by the Free Software Foundation.

 */

/dts-v1/;

#include "stih407.dtsi"

#include "stih407-clock.dtsi"

#include "stih407-family.dtsi"

#include "stihxxx-b2120.dtsi"

/ {

	model = "STiH407 B2120";

	compatible = "st,stih407-b2120", "st,stih407";



	chosen {

		bootargs = "console=ttyAS0,115200";

		bootargs = "console=ttyAS0,115200 clk_ignore_unused";

		linux,stdout-path = &sbc_serial0;

	};
@@ -26,53 +28,4 @@ 
		ttyAS0 = &sbc_serial0;

	};



	soc {

		sbc_serial0: serial@9530000 {

			status = "okay";

		};



		leds {

			compatible = "gpio-leds";

			red {

				#gpio-cells = <2>;

				label = "Front Panel LED";

				gpios = <&pio4 1 0>;

				linux,default-trigger = "heartbeat";

			};

			green {

				#gpio-cells = <2>;

				gpios = <&pio1 3 0>;

				default-state = "off";

			};

		};



		i2c@9842000 {

			status = "okay";

		};



		i2c@9843000 {

			status = "okay";

		};



		i2c@9844000 {

			status = "okay";

		};



		i2c@9845000 {

			status = "okay";

		};



		i2c@9540000 {

			status = "okay";

		};



		/* SSC11 to HDMI */

		i2c@9541000 {

			status = "okay";

			/* HDMI V1.3a supports Standard mode only */

			clock-frequency = <100000>;

			st,i2c-min-scl-pulse-width-us = <0>;

			st,i2c-min-sda-pulse-width-us = <5>;

		};

	};

};

arch/arm/boot/dts/stih407.dtsi→arch/arm/boot/dts/stih407-family.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * publishhed by the Free Software Foundation.

 */

#include "stih407-clock.dtsi"

#include "stih407-pinctrl.dtsi"

#include <dt-bindings/reset-controller/stih407-resets.h>

/ {

arch/arm/boot/dts/stih410-b2120.dts

0 → 100644
+29 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 STMicroelectronics (R&D) Limited.

 * Author: Peter Griffin <peter.griffin@linaro.org>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/dts-v1/;

#include "stih410.dtsi"

#include "stihxxx-b2120.dtsi"

/ {

	model = "STiH410 B2120";

	compatible = "st,stih410-b2120", "st,stih410";



	chosen {

		bootargs = "console=ttyAS0,115200 clk_ignore_unused";

		linux,stdout-path = &sbc_serial0;

	};



	memory {

		device_type = "memory";

		reg = <0x40000000 0x80000000>;

	};



	aliases {

		ttyAS0 = &sbc_serial0;

	};

};

arch/arm/boot/dts/stih410-clock.dtsi

0 → 100644
+338 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 STMicroelectronics R&D Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#include <dt-bindings/clock/stih410-clks.h>

/ {

	clocks {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		compatible = "st,stih410-clk", "simple-bus";



		/*

		 * Fixed 30MHz oscillator inputs to SoC

		 */

		clk_sysin: clk-sysin {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <30000000>;

			clock-output-names = "CLK_SYSIN";

		};



		/*

		 * ARM Peripheral clock for timers

		 */

		arm_periph_clk: clk-m-a9-periphs {

			#clock-cells = <0>;

			compatible = "fixed-factor-clock";

			clocks = <&clk_m_a9>;

			clock-div = <2>;

			clock-mult = <1>;

		};



		/*

		 * A9 PLL.

		 */

		clockgen-a9@92b0000 {

			compatible = "st,clkgen-c32";

			reg = <0x92b0000 0xffff>;



			clockgen_a9_pll: clockgen-a9-pll {

				#clock-cells = <1>;

				compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";



				clocks = <&clk_sysin>;



				clock-output-names = "clockgen-a9-pll-odf";

			};

		};



		/*

		 * ARM CPU related clocks.

		 */

		clk_m_a9: clk-m-a9@92b0000 {

			#clock-cells = <0>;

			compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";

			reg = <0x92b0000 0x10000>;



			clocks = <&clockgen_a9_pll 0>,

				 <&clockgen_a9_pll 0>,

				 <&clk_s_c0_flexgen 13>,

				 <&clk_m_a9_ext2f_div2>;

		};



		/*

		 * ARM Peripheral clock for timers

		 */

		clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {

			#clock-cells = <0>;

			compatible = "fixed-factor-clock";



			clocks = <&clk_s_c0_flexgen 13>;



			clock-output-names = "clk-m-a9-ext2f-div2";



			clock-div = <2>;

			clock-mult = <1>;

		};



		/*

		 * Bootloader initialized system infrastructure clock for

		 * serial devices.

		 */

		clk_ext2f_a9: clockgen-c0@13 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <200000000>;

			clock-output-names = "clk-s-icn-reg-0";

		};



		clockgen-a@090ff000 {

			compatible = "st,clkgen-c32";

			reg = <0x90ff000 0x1000>;



			clk_s_a0_pll: clk-s-a0-pll {

				#clock-cells = <1>;

				compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-a0-pll-ofd-0";

			};



			clk_s_a0_flexgen: clk-s-a0-flexgen {

				compatible = "st,flexgen";



				#clock-cells = <1>;



				clocks = <&clk_s_a0_pll 0>,

					 <&clk_sysin>;



				clock-output-names = "clk-ic-lmi0",

						     "clk-ic-lmi1";

			};

		};



		clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {

			#clock-cells = <1>;

			compatible = "st,stih407-quadfs660-C", "st,quadfs";

			reg = <0x9103000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-c0-fs0-ch0",

					     "clk-s-c0-fs0-ch1",

					     "clk-s-c0-fs0-ch2",

					     "clk-s-c0-fs0-ch3";

		};



		clk_s_c0: clockgen-c@09103000 {

			compatible = "st,clkgen-c32";

			reg = <0x9103000 0x1000>;



			clk_s_c0_pll0: clk-s-c0-pll0 {

				#clock-cells = <1>;

				compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-c0-pll0-odf-0";

			};



			clk_s_c0_pll1: clk-s-c0-pll1 {

				#clock-cells = <1>;

				compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-c0-pll1-odf-0";

			};



			clk_s_c0_flexgen: clk-s-c0-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";



				clocks = <&clk_s_c0_pll0 0>,

					 <&clk_s_c0_pll1 0>,

					 <&clk_s_c0_quadfs 0>,

					 <&clk_s_c0_quadfs 1>,

					 <&clk_s_c0_quadfs 2>,

					 <&clk_s_c0_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-icn-gpu",

						     "clk-fdma",

						     "clk-nand",

						     "clk-hva",

						     "clk-proc-stfe",

						     "clk-proc-tp",

						     "clk-rx-icn-dmu",

						     "clk-rx-icn-hva",

						     "clk-icn-cpu",

						     "clk-tx-icn-dmu",

						     "clk-mmc-0",

						     "clk-mmc-1",

						     "clk-jpegdec",

						     "clk-ext2fa9",

						     "clk-ic-bdisp-0",

						     "clk-ic-bdisp-1",

						     "clk-pp-dmu",

						     "clk-vid-dmu",

						     "clk-dss-lpc",

						     "clk-st231-aud-0",

						     "clk-st231-gp-1",

						     "clk-st231-dmu",

						     "clk-icn-lmi",

						     "clk-tx-icn-disp-1",

						     "clk-icn-sbc",

						     "clk-stfe-frc2",

						     "clk-eth-phy",

						     "clk-eth-ref-phyclk",

						     "clk-flash-promip",

						     "clk-main-disp",

						     "clk-aux-disp",

						     "clk-compo-dvp",

						     "clk-tx-icn-hades",

						     "clk-rx-icn-hades",

						     "clk-icn-reg-16",

						     "clk-pp-hades",

						     "clk-clust-hades",

						     "clk-hwpe-hades",

						     "clk-fc-hades";

			};

		};



		clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {

			#clock-cells = <1>;

			compatible = "st,stih407-quadfs660-D", "st,quadfs";

			reg = <0x9104000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d0-fs0-ch0",

					     "clk-s-d0-fs0-ch1",

					     "clk-s-d0-fs0-ch2",

					     "clk-s-d0-fs0-ch3";

		};



		clockgen-d0@09104000 {

			compatible = "st,clkgen-c32";

			reg = <0x9104000 0x1000>;



			clk_s_d0_flexgen: clk-s-d0-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";



				clocks = <&clk_s_d0_quadfs 0>,

					 <&clk_s_d0_quadfs 1>,

					 <&clk_s_d0_quadfs 2>,

					 <&clk_s_d0_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-pcm-0",

						     "clk-pcm-1",

						     "clk-pcm-2",

						     "clk-spdiff",

						     "clk-pcmr10-master",

						     "clk-usb2-phy";

			};

		};



		clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {

			#clock-cells = <1>;

			compatible = "st,stih407-quadfs660-D", "st,quadfs";

			reg = <0x9106000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d2-fs0-ch0",

					     "clk-s-d2-fs0-ch1",

					     "clk-s-d2-fs0-ch2",

					     "clk-s-d2-fs0-ch3";

		};



		clk_tmdsout_hdmi: clk-tmdsout-hdmi {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <0>;

		};



		clockgen-d2@x9106000 {

			compatible = "st,clkgen-c32";

			reg = <0x9106000 0x1000>;



			clk_s_d2_flexgen: clk-s-d2-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";



				clocks = <&clk_s_d2_quadfs 0>,

					 <&clk_s_d2_quadfs 1>,

					 <&clk_s_d2_quadfs 2>,

					 <&clk_s_d2_quadfs 3>,

					 <&clk_sysin>,

					 <&clk_sysin>,

					 <&clk_tmdsout_hdmi>;



				clock-output-names = "clk-pix-main-disp",

						     "clk-pix-pip",

						     "clk-pix-gdp1",

						     "clk-pix-gdp2",

						     "clk-pix-gdp3",

						     "clk-pix-gdp4",

						     "clk-pix-aux-disp",

						     "clk-denc",

						     "clk-pix-hddac",

						     "clk-hddac",

						     "clk-sddac",

						     "clk-pix-dvo",

						     "clk-dvo",

						     "clk-pix-hdmi",

						     "clk-tmds-hdmi",

						     "clk-ref-hdmiphy";

						     };

		};



		clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {

			#clock-cells = <1>;

			compatible = "st,stih407-quadfs660-D", "st,quadfs";

			reg = <0x9107000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d3-fs0-ch0",

					     "clk-s-d3-fs0-ch1",

					     "clk-s-d3-fs0-ch2",

					     "clk-s-d3-fs0-ch3";

		};



		clockgen-d3@9107000 {

			compatible = "st,clkgen-c32";

			reg = <0x9107000 0x1000>;



			clk_s_d3_flexgen: clk-s-d3-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";



				clocks = <&clk_s_d3_quadfs 0>,

					 <&clk_s_d3_quadfs 1>,

					 <&clk_s_d3_quadfs 2>,

					 <&clk_s_d3_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-stfe-frc1",

						     "clk-tsout-0",

						     "clk-tsout-1",

						     "clk-mchi",

						     "clk-vsens-compo",

						     "clk-frc1-remote",

						     "clk-lpc-0",

						     "clk-lpc-1";

			};

		};

	};

};

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