Commit ec2e082a authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/powerplay: check vrefresh when when changing displays 



Compare the current vrefresh in addition to the number of displays
when determining whether or not the smu needs updates when changing
modes. The SMU needs to be updated if the vbi timeout changes due
to a different refresh rate.  Fixes flickering around mode changes
in some cases on polaris parts.

Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7ea34ea3

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+3 −0
Original line number Diff line number Diff line
@@ -4132,6 +4132,9 @@ smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) 
	if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)

		is_update_required = true;



	if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)

		is_update_required = true;



	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {

		if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&

			(data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

+1 −0
Original line number Diff line number Diff line
@@ -156,6 +156,7 @@ struct smu7_vbios_boot_state { 
struct smu7_display_timing {

	uint32_t  min_clock_in_sr;

	uint32_t  num_existing_displays;

	uint32_t  vrefresh;

};



struct smu7_dpmlevel_enable_mask {

drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c

+1 −0
Original line number Diff line number Diff line
@@ -1231,6 +1231,7 @@ static int ci_populate_single_memory_level( 
	memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;



	data->display_timing.num_existing_displays = hwmgr->display_config->num_display;

	data->display_timing.vrefresh = hwmgr->display_config->vrefresh;



	/* stutter mode not support on ci */

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+2 −1
Original line number Diff line number Diff line
@@ -1210,7 +1210,8 @@ static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr, 
	 * PECI_GetNumberOfActiveDisplays(hwmgr->pPECI,

	 * &(data->DisplayTiming.numExistingDisplays));

	 */

	data->display_timing.num_existing_displays = 1;

	data->display_timing.num_existing_displays = hwmgr->display_config->num_display;

	data->display_timing.vrefresh = hwmgr->display_config->vrefresh;



	if (mclk_stutter_mode_threshold &&

		(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c

+1 −0
Original line number Diff line number Diff line
@@ -1280,6 +1280,7 @@ static int iceland_populate_single_memory_level( 
	memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;



	data->display_timing.num_existing_displays = hwmgr->display_config->num_display;

	data->display_timing.vrefresh = hwmgr->display_config->vrefresh;



	/* stutter mode not support on iceland */

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