Commit ebfc45ee authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 

Pull more networking fixes from David Miller:

 1) Fix mlx4_en_netpoll implementation, it needs to schedule a NAPI
    context, not synchronize it.  From Chris Mason.

 2) Ipv4 flow input interface should never be zero, it should be
    LOOPBACK_IFINDEX instead.  From Cong Wang and Julian Anastasov.

 3) Properly configure MAC to PHY connection in mvneta devices, from
    Thomas Petazzoni.

 4) sys_recv should use SYSCALL_DEFINE.  From Jan Glauber.

 5) Tunnel driver ioctls do not use the correct namespace, fix from
    Nicolas Dichtel.

 6) Fix memory leak on seccomp filter attach, from Kees Cook.

 7) Fix lockdep warning for nested vlans, from Ding Tianhong.

 8) Crashes can happen in SCTP due to how the auth_enable value is
    managed, fix from Vlad Yasevich.

 9) Wireless fixes from John W Linville and co.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (45 commits)
  net: sctp: cache auth_enable per endpoint
  tg3: update rx_jumbo_pending ring param only when jumbo frames are enabled
  vlan: Fix lockdep warning when vlan dev handle notification
  seccomp: fix memory leak on filter attach
  isdn: icn: buffer overflow in icn_command()
  ip6_tunnel: use the right netns in ioctl handler
  sit: use the right netns in ioctl handler
  ip_tunnel: use the right netns in ioctl handler
  net: use SYSCALL_DEFINEx for sys_recv
  net: mdio-gpio: Add support for separate MDI and MDO gpio pins
  net: mdio-gpio: Add support for active low gpio pins
  net: mdio-gpio: Use devm_ functions where possible
  ipv4, route: pass 0 instead of LOOPBACK_IFINDEX to fib_validate_source()
  ipv4, fib: pass LOOPBACK_IFINDEX instead of 0 to flowi4_iif
  mlx4_en: don't use napi_synchronize inside mlx4_en_netpoll
  net: mvneta: properly configure the MAC <-> PHY connection in all situations
  net: phy: add minimal support for QSGMII PHY
  sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
  mwifiex: fix hung task on command timeout
  mwifiex: process event before command response
  ...
parents 6e66d5da b14878cc

Documentation/devicetree/bindings/net/ethernet.txt

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ The following properties are common to the Ethernet controllers: 
- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than

  the maximum frame size (there's contradiction in ePAPR).

- phy-mode: string, operation mode of the PHY interface; supported values are

  "mii", "gmii", "sgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",

  "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",

  "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto

  standard property;

- phy-connection-type: the same as "phy-mode" property but described in ePAPR;

drivers/isdn/icn/icn.c

+5 −6
Original line number Diff line number Diff line
@@ -1155,7 +1155,7 @@ icn_command(isdn_ctrl *c, icn_card *card) 
	ulong a;

	ulong flags;

	int i;

	char cbuf[60];

	char cbuf[80];

	isdn_ctrl cmd;

	icn_cdef cdef;

	char __user *arg;
@@ -1309,7 +1309,6 @@ icn_command(isdn_ctrl *c, icn_card *card) 
			break;

		if ((c->arg & 255) < ICN_BCH) {

			char *p;

			char dial[50];

			char dcode[4];



			a = c->arg;
@@ -1321,9 +1320,9 @@ icn_command(isdn_ctrl *c, icn_card *card) 
			} else

				/* Normal Dial */

				strcpy(dcode, "CAL");

			strcpy(dial, p);

			sprintf(cbuf, "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1),

				dcode, dial, c->parm.setup.si1,

			snprintf(cbuf, sizeof(cbuf),

				 "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1),

				 dcode, p, c->parm.setup.si1,

				 c->parm.setup.si2, c->parm.setup.eazmsn);

			i = icn_writecmd(cbuf, strlen(cbuf), 0, card);

		}

drivers/net/ethernet/broadcom/tg3.c

+3 −1
Original line number Diff line number Diff line
@@ -12286,6 +12286,8 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e 
	if (tg3_flag(tp, MAX_RXPEND_64) &&

	    tp->rx_pending > 63)

		tp->rx_pending = 63;



	if (tg3_flag(tp, JUMBO_RING_ENABLE))

		tp->rx_jumbo_pending = ering->rx_jumbo_pending;



	for (i = 0; i < tp->irq_max; i++)

drivers/net/ethernet/marvell/mvneta.c

+34 −39
Original line number Diff line number Diff line
@@ -89,8 +89,9 @@ 
#define      MVNETA_TX_IN_PRGRS                  BIT(1)

#define      MVNETA_TX_FIFO_EMPTY                BIT(8)

#define MVNETA_RX_MIN_FRAME_SIZE                 0x247c

#define MVNETA_SGMII_SERDES_CFG			 0x24A0

#define MVNETA_SERDES_CFG			 0x24A0

#define      MVNETA_SGMII_SERDES_PROTO		 0x0cc7

#define      MVNETA_QSGMII_SERDES_PROTO		 0x0667

#define MVNETA_TYPE_PRIO                         0x24bc

#define      MVNETA_FORCE_UNI                    BIT(21)

#define MVNETA_TXQ_CMD_1                         0x24e4
@@ -711,35 +712,6 @@ static void mvneta_rxq_bm_disable(struct mvneta_port *pp, 
	mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val);

}







/* Sets the RGMII Enable bit (RGMIIEn) in port MAC control register */

static void mvneta_gmac_rgmii_set(struct mvneta_port *pp, int enable)

{

	u32  val;



	val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);



	if (enable)

		val |= MVNETA_GMAC2_PORT_RGMII;

	else

		val &= ~MVNETA_GMAC2_PORT_RGMII;



	mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);

}



/* Config SGMII port */

static void mvneta_port_sgmii_config(struct mvneta_port *pp)

{

	u32 val;



	val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);

	val |= MVNETA_GMAC2_PCS_ENABLE;

	mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);



	mvreg_write(pp, MVNETA_SGMII_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);

}



/* Start the Ethernet port RX and TX activity */

static void mvneta_port_up(struct mvneta_port *pp)

{
@@ -2749,26 +2721,44 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp, 
}



/* Power up the port */

static void mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)

static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)

{

	u32 val;

	u32 ctrl;



	/* MAC Cause register should be cleared */

	mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0);



	if (phy_mode == PHY_INTERFACE_MODE_SGMII)

		mvneta_port_sgmii_config(pp);

	ctrl = mvreg_read(pp, MVNETA_GMAC_CTRL_2);



	mvneta_gmac_rgmii_set(pp, 1);

	/* Even though it might look weird, when we're configured in

	 * SGMII or QSGMII mode, the RGMII bit needs to be set.

	 */

	switch(phy_mode) {

	case PHY_INTERFACE_MODE_QSGMII:

		mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);

		ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;

		break;

	case PHY_INTERFACE_MODE_SGMII:

		mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);

		ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;

		break;

	case PHY_INTERFACE_MODE_RGMII:

	case PHY_INTERFACE_MODE_RGMII_ID:

		ctrl |= MVNETA_GMAC2_PORT_RGMII;

		break;

	default:

		return -EINVAL;

	}



	/* Cancel Port Reset */

	val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);

	val &= ~MVNETA_GMAC2_PORT_RESET;

	mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);

	ctrl &= ~MVNETA_GMAC2_PORT_RESET;

	mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl);



	while ((mvreg_read(pp, MVNETA_GMAC_CTRL_2) &

		MVNETA_GMAC2_PORT_RESET) != 0)

		continue;



	return 0;

}



/* Device initialization routine */
@@ -2879,7 +2869,12 @@ static int mvneta_probe(struct platform_device *pdev) 
		dev_err(&pdev->dev, "can't init eth hal\n");

		goto err_free_stats;

	}

	mvneta_port_power_up(pp, phy_mode);



	err = mvneta_port_power_up(pp, phy_mode);

	if (err < 0) {

		dev_err(&pdev->dev, "can't power up port\n");

		goto err_deinit;

	}



	dram_target_info = mv_mbus_dram_info();

	if (dram_target_info)

drivers/net/ethernet/mellanox/mlx4/en_cq.c

+0 −1
Original line number Diff line number Diff line
@@ -66,7 +66,6 @@ int mlx4_en_create_cq(struct mlx4_en_priv *priv, 


	cq->ring = ring;

	cq->is_tx = mode;

	spin_lock_init(&cq->lock);



	/* Allocate HW buffers on provided NUMA node.

	 * dev->numa_node is used in mtt range allocation flow.

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