Commit ebdea46f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm 

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits)
  [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
  [ARM] 3855/1: Add generic time support
  [ARM] 3873/1: S3C24XX: Add irq_chip names
  [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips
  [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23
  [ARM] nommu: confirms the CR_V bit in nommu mode
  [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.
  [ARM] 3870/1: AT91: Start removing static memory mappings
  [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards
  [ARM] 3868/1: AT91 hardware header update
  [ARM] 3867/1: AT91 GPIO update
  [ARM] 3866/1: AT91 clock update
  [ARM] 3865/1: AT91RM9200 header updates
  [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series
  [ARM] kthread: switch arch/arm/kernel/apm.c
  [ARM] Off-by-one in arch/arm/common/icst*
  [ARM] 3864/1: Refactore sharpsl_pm
  [ARM] 3863/1: Add Locomo SPI Device
  [ARM] 3847/2:  Convert LOMOMO to use struct device for GPIOs
  [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h
  ...
parents fecf3404 250d375d

arch/arm/Kconfig

+38 −12
Original line number Diff line number Diff line
@@ -17,6 +17,10 @@ config ARM 
	  Europe.  There is an ARM Linux project with a web page at

	  <http://www.arm.linux.org.uk/>.



config GENERIC_TIME

	bool

	default n



config MMU

	bool

	default y
@@ -51,6 +55,10 @@ config GENERIC_HARDIRQS 
	bool

	default y



config TRACE_IRQFLAGS_SUPPORT

	bool

	default y



config HARDIRQS_SW_RESEND

	bool

	default y
@@ -91,7 +99,7 @@ config ARCH_MTD_XIP 


config VECTORS_BASE

	hex

	default 0xffff0000 if MMU

	default 0xffff0000 if MMU || CPU_HIGH_VECTOR

	default DRAM_BASE if REMAP_VECTORS_TO_RAM

	default 0x00000000

	help
@@ -198,16 +206,27 @@ config ARCH_IMX 
	help

	  Support for Motorola's i.MX family of processors (MX1, MXL).



config ARCH_IOP3XX

	bool "IOP3xx-based"

config ARCH_IOP32X

	bool "IOP32x-based"

	depends on MMU

	select PLAT_IOP

	select PCI

	help

	  Support for Intel's 80219 and IOP32X (XScale) family of

	  processors.



config ARCH_IOP33X

	bool "IOP33x-based"

	depends on MMU

	select PLAT_IOP

	select PCI

	help

	  Support for Intel's IOP3XX (XScale) family of processors.

	  Support for Intel's IOP33X (XScale) family of processors.



config ARCH_IXP4XX

	bool "IXP4xx-based"

	depends on MMU

	select GENERIC_TIME

	help

	  Support for Intel's IXP4XX (XScale) family of processors.
@@ -308,7 +327,9 @@ source "arch/arm/mach-footbridge/Kconfig" 


source "arch/arm/mach-integrator/Kconfig"



source "arch/arm/mach-iop3xx/Kconfig"

source "arch/arm/mach-iop32x/Kconfig"



source "arch/arm/mach-iop33x/Kconfig"



source "arch/arm/mach-ixp4xx/Kconfig"
@@ -348,6 +369,9 @@ source "arch/arm/mach-netx/Kconfig" 
config ARCH_ACORN

	bool



config PLAT_IOP

	bool



source arch/arm/mm/Kconfig



#  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
@@ -602,6 +626,7 @@ config LEDS_CPU 


config ALIGNMENT_TRAP

	bool

	depends on CPU_CP15_MMU

	default y if !ARCH_EBSA110

	help

	  ARM processors can not fetch/store information which is not
@@ -633,11 +658,12 @@ config ZBOOT_ROM_BSS 
	hex "Compressed ROM boot loader BSS address"

	default "0"

	help

	  The base address of 64KiB of read/write memory in the target

	  for the ROM-able zImage, which must be available while the

	  decompressor is running.  Platforms which normally make use of

	  ROM-able zImage formats normally set this to a suitable

	  value in their defconfig file.

	  The base address of an area of read/write memory in the target

	  for the ROM-able zImage which must be available while the

	  decompressor is running. It must be large enough to hold the

	  entire decompressed kernel plus an additional 128 KiB.

	  Platforms which normally make use of ROM-able zImage formats

	  normally set this to a suitable value in their defconfig file.



	  If ZBOOT_ROM is not enabled, this has no effect.
@@ -832,7 +858,7 @@ source "drivers/base/Kconfig" 


source "drivers/connector/Kconfig"



if ALIGNMENT_TRAP

if ALIGNMENT_TRAP || !CPU_CP15_MMU

source "drivers/mtd/Kconfig"

endif
@@ -844,7 +870,7 @@ source "drivers/block/Kconfig" 


source "drivers/acorn/block/Kconfig"



if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \

if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \

	|| ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \

	|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \

	|| ARCH_IXP23XX

arch/arm/Kconfig-nommu

+8 −0
Original line number Diff line number Diff line
@@ -25,6 +25,14 @@ config FLASH_SIZE 
	hex 'FLASH Size' if SET_MEM_PARAM

	default 0x00400000



config PROCESSOR_ID

	hex

	default 0x00007700

	depends on !CPU_CP15

	help

	  If processor has no CP15 register, this processor ID is

	  used instead of the auto-probing which utilizes the register.



config REMAP_VECTORS_TO_RAM

	bool 'Install vectors to the begining of RAM' if DRAM_BASE

	depends on DRAM_BASE

arch/arm/Makefile

+8 −1
Original line number Diff line number Diff line
@@ -55,7 +55,12 @@ arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 
# This selects how we optimise for the processor.

tune-$(CONFIG_CPU_ARM610)	:=-mtune=arm610

tune-$(CONFIG_CPU_ARM710)	:=-mtune=arm710

tune-$(CONFIG_CPU_ARM7TDMI)	:=-mtune=arm7tdmi

tune-$(CONFIG_CPU_ARM720T)	:=-mtune=arm7tdmi

tune-$(CONFIG_CPU_ARM740T)	:=-mtune=arm7tdmi

tune-$(CONFIG_CPU_ARM9TDMI)	:=-mtune=arm9tdmi

tune-$(CONFIG_CPU_ARM940T)	:=-mtune=arm9tdmi

tune-$(CONFIG_CPU_ARM946T)	:=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi)

tune-$(CONFIG_CPU_ARM920T)	:=-mtune=arm9tdmi

tune-$(CONFIG_CPU_ARM922T)	:=-mtune=arm9tdmi

tune-$(CONFIG_CPU_ARM925T)	:=-mtune=arm9tdmi
@@ -101,7 +106,8 @@ endif 
 machine-$(CONFIG_ARCH_INTEGRATOR) := integrator

 textofs-$(CONFIG_ARCH_CLPS711X)   := 0x00028000

 machine-$(CONFIG_ARCH_CLPS711X)   := clps711x

 machine-$(CONFIG_ARCH_IOP3XX)	   := iop3xx

 machine-$(CONFIG_ARCH_IOP32X)	   := iop32x

 machine-$(CONFIG_ARCH_IOP33X)	   := iop33x

 machine-$(CONFIG_ARCH_IXP4XX)	   := ixp4xx

 machine-$(CONFIG_ARCH_IXP2000)    := ixp2000

 machine-$(CONFIG_ARCH_IXP23XX)    := ixp23xx
@@ -157,6 +163,7 @@ core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ) 
core-$(CONFIG_VFP)		+= arch/arm/vfp/



# If we have a common platform directory, then include it in the build.

core-$(CONFIG_PLAT_IOP)		+= arch/arm/plat-iop/

core-$(CONFIG_ARCH_OMAP)	+= arch/arm/plat-omap/



drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/

arch/arm/boot/compressed/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -51,7 +51,11 @@ OBJS += head-at91rm9200.o 
endif



ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)

ifeq ($(CONFIG_CPU_CP15),y)

OBJS		+= big-endian.o

else

# The endian should be set by h/w design.

endif

endif



#

arch/arm/boot/compressed/head.S

+16 −6
Original line number Diff line number Diff line
@@ -20,11 +20,21 @@ 
#ifdef DEBUG



#if defined(CONFIG_DEBUG_ICEDCC)



#ifdef CONFIG_CPU_V6

		.macro	loadsp, rb

		.endm

		.macro	writeb, ch, rb

		mcr	p14, 0, \ch, c0, c5, 0

		.endm

#else

		.macro	loadsp, rb

		.endm

		.macro	writeb, ch, rb

		mcr	p14, 0, \ch, c0, c1, 0

		.endm

#endif



#else



#include <asm/arch/debug-macro.S>
@@ -42,12 +52,6 @@ 
		add	\rb, \rb, #0x00010000	@ Ser1

#endif

		.endm

#elif defined(CONFIG_ARCH_IOP331)

		.macro loadsp, rb

                mov   	\rb, #0xff000000

                orr     \rb, \rb, #0x00ff0000

                orr     \rb, \rb, #0x0000f700   @ location of the UART

		.endm

#elif defined(CONFIG_ARCH_S3C2410)

		.macro loadsp, rb

		mov	\rb, #0x50000000
@@ -78,9 +82,11 @@ 
		kphex	r6, 8		/* processor id */

		kputc	#':'

		kphex	r7, 8		/* architecture id */

#ifdef CONFIG_CPU_CP15

		kputc	#':'

		mrc	p15, 0, r0, c1, c0

		kphex	r0, 8		/* control reg */

#endif

		kputc	#'\n'

		kphex	r5, 8		/* decompressed kernel start */

		kputc	#'-'
@@ -503,7 +509,11 @@ call_kernel: bl cache_clean_flush 
 */



call_cache_fn:	adr	r12, proc_types

#ifdef CONFIG_CPU_CP15

		mrc	p15, 0, r6, c0, c0	@ get processor ID

#else

		ldr	r6, =CONFIG_PROCESSOR_ID

#endif

1:		ldr	r1, [r12, #0]		@ get value

		ldr	r2, [r12, #4]		@ get mask

		eor	r1, r1, r6		@ (real ^ match)

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