Commit ebcd580b authored by Brian Gerst's avatar Brian Gerst Committed by Thomas Gleixner
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x86/percpu: Clean up percpu_cmpxchg_op() 



The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
Signed-off-by: default avatarNick Desaulniers <ndesaulniers@google.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarNick Desaulniers <ndesaulniers@google.com>
Tested-by: default avatarSedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: default avatarNick Desaulniers <ndesaulniers@google.com>
Acked-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: default avatarDennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-9-ndesaulniers@google.com
parent 73ca542f

arch/x86/include/asm/percpu.h

+18 −40
Original line number Diff line number Diff line
@@ -236,39 +236,17 @@ do { \ 
 * cmpxchg has no such implied lock semantics as a result it is much

 * more efficient for cpu local operations.

 */

#define percpu_cmpxchg_op(qual, var, oval, nval)			\

#define percpu_cmpxchg_op(size, qual, _var, _oval, _nval)		\

({									\

	typeof(var) pco_ret__;						\

	typeof(var) pco_old__ = (oval);					\

	typeof(var) pco_new__ = (nval);					\

	switch (sizeof(var)) {						\

	case 1:								\

		asm qual ("cmpxchgb %2, "__percpu_arg(1)		\

			    : "=a" (pco_ret__), "+m" (var)		\

			    : "q" (pco_new__), "0" (pco_old__)		\

			    : "memory");				\

		break;							\

	case 2:								\

		asm qual ("cmpxchgw %2, "__percpu_arg(1)		\

			    : "=a" (pco_ret__), "+m" (var)		\

			    : "r" (pco_new__), "0" (pco_old__)		\

			    : "memory");				\

		break;							\

	case 4:								\

		asm qual ("cmpxchgl %2, "__percpu_arg(1)		\

			    : "=a" (pco_ret__), "+m" (var)		\

			    : "r" (pco_new__), "0" (pco_old__)		\

			    : "memory");				\

		break;							\

	case 8:								\

		asm qual ("cmpxchgq %2, "__percpu_arg(1)		\

			    : "=a" (pco_ret__), "+m" (var)		\

			    : "r" (pco_new__), "0" (pco_old__)		\

	__pcpu_type_##size pco_old__ = __pcpu_cast_##size(_oval);	\

	__pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval);	\

	asm qual (__pcpu_op2_##size("cmpxchg", "%[nval]",		\

				    __percpu_arg([var]))		\

		  : [oval] "+a" (pco_old__),				\

		    [var] "+m" (_var)					\

		  : [nval] __pcpu_reg_##size(, pco_new__)		\

		  : "memory");						\

		break;							\

	default: __bad_percpu_size();					\

	}								\

	pco_ret__;							\

	(typeof(_var))(unsigned long) pco_old__;			\

})



/*
@@ -336,16 +314,16 @@ do { \ 
#define raw_cpu_add_return_1(pcp, val)		percpu_add_return_op(1, , pcp, val)

#define raw_cpu_add_return_2(pcp, val)		percpu_add_return_op(2, , pcp, val)

#define raw_cpu_add_return_4(pcp, val)		percpu_add_return_op(4, , pcp, val)

#define raw_cpu_cmpxchg_1(pcp, oval, nval)	percpu_cmpxchg_op(, pcp, oval, nval)

#define raw_cpu_cmpxchg_2(pcp, oval, nval)	percpu_cmpxchg_op(, pcp, oval, nval)

#define raw_cpu_cmpxchg_4(pcp, oval, nval)	percpu_cmpxchg_op(, pcp, oval, nval)

#define raw_cpu_cmpxchg_1(pcp, oval, nval)	percpu_cmpxchg_op(1, , pcp, oval, nval)

#define raw_cpu_cmpxchg_2(pcp, oval, nval)	percpu_cmpxchg_op(2, , pcp, oval, nval)

#define raw_cpu_cmpxchg_4(pcp, oval, nval)	percpu_cmpxchg_op(4, , pcp, oval, nval)



#define this_cpu_add_return_1(pcp, val)		percpu_add_return_op(1, volatile, pcp, val)

#define this_cpu_add_return_2(pcp, val)		percpu_add_return_op(2, volatile, pcp, val)

#define this_cpu_add_return_4(pcp, val)		percpu_add_return_op(4, volatile, pcp, val)

#define this_cpu_cmpxchg_1(pcp, oval, nval)	percpu_cmpxchg_op(volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_2(pcp, oval, nval)	percpu_cmpxchg_op(volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_4(pcp, oval, nval)	percpu_cmpxchg_op(volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_1(pcp, oval, nval)	percpu_cmpxchg_op(1, volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_2(pcp, oval, nval)	percpu_cmpxchg_op(2, volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_4(pcp, oval, nval)	percpu_cmpxchg_op(4, volatile, pcp, oval, nval)



#ifdef CONFIG_X86_CMPXCHG64

#define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2)		\
@@ -376,7 +354,7 @@ do { \ 
#define raw_cpu_or_8(pcp, val)			percpu_to_op(8, , "or", (pcp), val)

#define raw_cpu_add_return_8(pcp, val)		percpu_add_return_op(8, , pcp, val)

#define raw_cpu_xchg_8(pcp, nval)		raw_percpu_xchg_op(pcp, nval)

#define raw_cpu_cmpxchg_8(pcp, oval, nval)	percpu_cmpxchg_op(, pcp, oval, nval)

#define raw_cpu_cmpxchg_8(pcp, oval, nval)	percpu_cmpxchg_op(8, , pcp, oval, nval)



#define this_cpu_read_8(pcp)			percpu_from_op(8, volatile, "mov", pcp)

#define this_cpu_write_8(pcp, val)		percpu_to_op(8, volatile, "mov", (pcp), val)
@@ -385,7 +363,7 @@ do { \ 
#define this_cpu_or_8(pcp, val)			percpu_to_op(8, volatile, "or", (pcp), val)

#define this_cpu_add_return_8(pcp, val)		percpu_add_return_op(8, volatile, pcp, val)

#define this_cpu_xchg_8(pcp, nval)		percpu_xchg_op(8, volatile, pcp, nval)

#define this_cpu_cmpxchg_8(pcp, oval, nval)	percpu_cmpxchg_op(volatile, pcp, oval, nval)

#define this_cpu_cmpxchg_8(pcp, oval, nval)	percpu_cmpxchg_op(8, volatile, pcp, oval, nval)



/*

 * Pretty complex macro to generate cmpxchg16 instruction.  The instruction

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