Commit ebc8eca1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (180 commits)
  powerpc: clean up ssi.txt, add definition for fsl,ssi-asynchronous
  powerpc/85xx: Add support for the "socrates" board (MPC8544).
  powerpc: Fix bugs introduced by sysfs changes
  powerpc: Sanitize stack pointer in signal handling code
  powerpc: Add write barrier before enabling DTL flags
  powerpc/83xx: Update ranges in gianfar node to match other dts
  powerpc/86xx: Move gianfar mdio nodes under the ethernet nodes
  powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
  powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
  powerpc/83xx: Add power management support for MPC837x boards
  powerpc/mm: Introduce early_init_mmu() on 64-bit
  powerpc/mm: Add option for non-atomic PTE updates to ppc64
  powerpc/mm: Fix printk type warning in mmu_context_nohash
  powerpc/mm: Rename arch/powerpc/kernel/mmap.c to mmap_64.c
  powerpc/mm: Merge various PTE bits and accessors definitions
  powerpc/mm: Tweak PTE bit combination definitions
  powerpc/cell: Fix iommu exception reporting
  powerpc/mm: e300c2/c3/c4 TLB errata workaround
  powerpc/mm: Used free register to save a few cycles in SW TLB miss handling
  powerpc/mm: Remove unused register usage in SW TLB miss handling
  ...
parents 25c1a411 9ff9a26b

Documentation/powerpc/dts-bindings/fsl/dma.txt

+17 −17
Original line number Diff line number Diff line
@@ -35,30 +35,30 @@ Example: 
		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "fsl,mpc8349-dma", "fsl,elo-dma";

		reg = <82a8 4>;

		ranges = <0 8100 1a4>;

		reg = <0x82a8 4>;

		ranges = <0 0x8100 0x1a4>;

		interrupt-parent = <&ipic>;

		interrupts = <47 8>;

		interrupts = <71 8>;

		cell-index = <0>;

		dma-channel@0 {

			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";

			cell-index = <0>;

			reg = <0 80>;

			reg = <0 0x80>;

		};

		dma-channel@80 {

			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";

			cell-index = <1>;

			reg = <80 80>;

			reg = <0x80 0x80>;

		};

		dma-channel@100 {

			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";

			cell-index = <2>;

			reg = <100 80>;

			reg = <0x100 0x80>;

		};

		dma-channel@180 {

			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";

			cell-index = <3>;

			reg = <180 80>;

			reg = <0x180 0x80>;

		};

	};
@@ -93,36 +93,36 @@ Example: 
		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";

		reg = <21300 4>;

		ranges = <0 21100 200>;

		reg = <0x21300 4>;

		ranges = <0 0x21100 0x200>;

		cell-index = <0>;

		dma-channel@0 {

			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";

			reg = <0 80>;

			reg = <0 0x80>;

			cell-index = <0>;

			interrupt-parent = <&mpic>;

			interrupts = <14 2>;

			interrupts = <20 2>;

		};

		dma-channel@80 {

			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";

			reg = <80 80>;

			reg = <0x80 0x80>;

			cell-index = <1>;

			interrupt-parent = <&mpic>;

			interrupts = <15 2>;

			interrupts = <21 2>;

		};

		dma-channel@100 {

			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";

			reg = <100 80>;

			reg = <0x100 0x80>;

			cell-index = <2>;

			interrupt-parent = <&mpic>;

			interrupts = <16 2>;

			interrupts = <22 2>;

		};

		dma-channel@180 {

			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";

			reg = <180 80>;

			reg = <0x180 0x80>;

			cell-index = <3>;

			interrupt-parent = <&mpic>;

			interrupts = <17 2>;

			interrupts = <23 2>;

		};

	};

Documentation/powerpc/dts-bindings/fsl/esdhc.txt

0 → 100644
+24 −0
Original line number Diff line number Diff line 
* Freescale Enhanced Secure Digital Host Controller (eSDHC)



The Enhanced Secure Digital Host Controller provides an interface

for MMC, SD, and SDIO types of memory cards.



Required properties:

  - compatible : should be

    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.

    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.

  - reg : should contain eSDHC registers location and length.

  - interrupts : should contain eSDHC interrupt.

  - interrupt-parent : interrupt source phandle.

  - clock-frequency : specifies eSDHC base clock frequency.



Example:



sdhci@2e000 {

	compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";

	reg = <0x2e000 0x1000>;

	interrupts = <42 0x8>;

	interrupt-parent = <&ipic>;

	/* Filled in by U-Boot */

	clock-frequency = <0>;

};

Documentation/powerpc/dts-bindings/fsl/ssi.txt

+40 −28
Original line number Diff line number Diff line
@@ -4,18 +4,18 @@ The SSI is a serial device that communicates with audio codecs. It can 
be programmed in AC97, I2S, left-justified, or right-justified modes.



Required properties:

- compatible	  : compatible list, containing "fsl,ssi"

- cell-index	  : the SSI, <0> = SSI1, <1> = SSI2, and so on

- reg		  : offset and length of the register set for the device

- compatible:       Compatible list, contains "fsl,ssi".

- cell-index:       The SSI, <0> = SSI1, <1> = SSI2, and so on.

- reg:              Offset and length of the register set for the device.

- interrupts:       <a b> where a is the interrupt number and b is a

                    field that represents an encoding of the sense and

                    level information for the interrupt.  This should be

                    encoded based on the information in section 2)

                    depending on the type of interrupt controller you

                    have.

- interrupt-parent : the phandle for the interrupt controller that

- interrupt-parent: The phandle for the interrupt controller that

                    services interrupts for this device.

- fsl,mode	  : the operating mode for the SSI interface

- fsl,mode:         The operating mode for the SSI interface.

                    "i2s-slave" - I2S mode, SSI is clock slave

                    "i2s-master" - I2S mode, SSI is clock master

                    "lj-slave" - left-justified mode, SSI is clock slave
@@ -24,24 +24,36 @@ Required properties: 
                    "rj-master" - r.j., SSI is clock master

                    "ac97-slave" - AC97 mode, SSI is clock slave

                    "ac97-master" - AC97 mode, SSI is clock master

- fsl,playback-dma: phandle to a node for the DMA channel to use for

- fsl,playback-dma: Phandle to a node for the DMA channel to use for

                    playback of audio.  This is typically dictated by SOC

                    design.  See the notes below.

- fsl,capture-dma:  phandle to a node for the DMA channel to use for

- fsl,capture-dma:  Phandle to a node for the DMA channel to use for

                    capture (recording) of audio.  This is typically dictated

                    by SOC design.  See the notes below.

- fsl,fifo-depth:   The number of elements in the transmit and receive FIFOs.

                    This number is the maximum allowed value for SFCSR[TFWM0].

- fsl,ssi-asynchronous:

                    If specified, the SSI is to be programmed in asynchronous

                    mode.  In this mode, pins SRCK, STCK, SRFS, and STFS must

                    all be connected to valid signals.  In synchronous mode,

                    SRCK and SRFS are ignored.  Asynchronous mode allows

                    playback and capture to use different sample sizes and

                    sample rates.  Some drivers may require that SRCK and STCK

                    be connected together, and SRFS and STFS be connected

                    together.  This would still allow different sample sizes,

                    but not different sample rates.



Optional properties:

- codec-handle	  : phandle to a 'codec' node that defines an audio

- codec-handle:     Phandle to a 'codec' node that defines an audio

                    codec connected to this SSI.  This node is typically

                    a child of an I2C or other control node.



Child 'codec' node required properties:

- compatible	  : compatible list, contains the name of the codec

- compatible:       Compatible list, contains the name of the codec



Child 'codec' node optional properties:

- clock-frequency  : The frequency of the input clock, which typically

                     comes from an on-board dedicated oscillator.

- clock-frequency:  The frequency of the input clock, which typically comes

                    from an on-board dedicated oscillator.



Notes on fsl,playback-dma and fsl,capture-dma:

arch/powerpc/Kconfig

+47 −27
Original line number Diff line number Diff line
@@ -111,6 +111,7 @@ config PPC 
	select HAVE_FTRACE_MCOUNT_RECORD

	select HAVE_DYNAMIC_FTRACE

	select HAVE_FUNCTION_TRACER

	select HAVE_FUNCTION_GRAPH_TRACER

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select HAVE_IDE

	select HAVE_IOREMAP_PROT
@@ -312,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE 


config KEXEC

	bool "kexec system call (EXPERIMENTAL)"

	depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL

	depends on BOOK3S && EXPERIMENTAL

	help

	  kexec is a system call that implements the ability to shutdown your

	  current kernel, and to start another kernel.  It is like a reboot
@@ -409,6 +410,18 @@ config PPC_HAS_HASH_64K 
	depends on PPC64

	default n



config STDBINUTILS

	bool "Using standard binutils settings"

	depends on 44x

	default y

	help

	  Turning this option off allows you to select 256KB PAGE_SIZE on 44x.

	  Note, that kernel will be able to run only those applications,

	  which had been compiled using binutils later than 2.17.50.0.3 with

	  '-zmax-page-size' set to 256K (the default is 64K). Or, if using

	  the older binutils, you can patch them with a trivial patch, which

	  changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000.



choice

	prompt "Page size"

	default PPC_4K_PAGES
@@ -444,6 +457,19 @@ config PPC_64K_PAGES 
	bool "64k page size" if 44x || PPC_STD_MMU_64

	select PPC_HAS_HASH_64K if PPC_STD_MMU_64



config PPC_256K_PAGES

	bool "256k page size" if 44x

	depends on !STDBINUTILS && (!SHMEM || BROKEN)

	help

	  Make the page size 256k.



	  As the ELF standard only requires alignment to support page

	  sizes up to 64k, you will need to compile all of your user

	  space applications with a non-standard binutils settings

	  (see the STDBINUTILS description for details).



	  Say N unless you know what you are doing.



endchoice



config FORCE_MAX_ZONEORDER
@@ -456,6 +482,8 @@ config FORCE_MAX_ZONEORDER 
	default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES

	range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES

	default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES

	range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES

	default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES

	range 11 64

	default "11"

	help
@@ -594,6 +622,7 @@ config FSL_SOC 
config FSL_PCI

 	bool

	select PPC_INDIRECT_PCI

	select PCI_QUIRKS



config 4xx_SOC

	bool
@@ -730,6 +759,22 @@ config LOWMEM_SIZE 
	hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL

	default "0x30000000"



config LOWMEM_CAM_NUM_BOOL

	bool "Set number of CAMs to use to map low memory"

	depends on ADVANCED_OPTIONS && FSL_BOOKE

	help

	  This option allows you to set the maximum number of CAM slots that

	  will be used to map low memory.  There are a limited number of slots

	  available and even more limited number that will fit in the L1 MMU.

	  However, using more entries will allow mapping more low memory.  This

	  can be useful in optimizing the layout of kernel virtual memory.



	  Say N here unless you know what you are doing.



config LOWMEM_CAM_NUM

	int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL

	default 3



config RELOCATABLE

	bool "Build a relocatable kernel (EXPERIMENTAL)"

	depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
@@ -794,7 +839,7 @@ config PHYSICAL_START 


config PHYSICAL_ALIGN

	hex

	default "0x10000000" if FSL_BOOKE

	default "0x04000000" if FSL_BOOKE

	help

	  This value puts the alignment restrictions on physical address

	  where kernel is loaded and run from. Kernel is compiled for an
@@ -815,31 +860,6 @@ config TASK_SIZE 
	default "0x80000000" if PPC_PREP || PPC_8xx

	default "0xc0000000"



config CONSISTENT_START_BOOL

	bool "Set custom consistent memory pool address"

	depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE

	help

	  This option allows you to set the base virtual address

	  of the consistent memory pool.  This pool of virtual

	  memory is used to make consistent memory allocations.



config CONSISTENT_START

	hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL

	default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx)

	default "0xff100000" if NOT_COHERENT_CACHE



config CONSISTENT_SIZE_BOOL

	bool "Set custom consistent memory pool size"

	depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE

	help

	  This option allows you to set the size of the

	  consistent memory pool.  This pool of virtual memory

	  is used to make consistent memory allocations.



config CONSISTENT_SIZE

	hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL

	default "0x00200000" if NOT_COHERENT_CACHE



config PIN_TLB

	bool "Pinned Kernel TLBs (860 ONLY)"

	depends on ADVANCED_OPTIONS && 8xx

arch/powerpc/Kconfig.debug

+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ config BDI_SWITCH 


config BOOTX_TEXT

	bool "Support for early boot text console (BootX or OpenFirmware only)"

	depends on PPC_OF && PPC_MULTIPLATFORM

	depends on PPC_OF && PPC_BOOK3S

	help

	  Say Y here to see progress messages from the boot firmware in text

	  mode. Requires either BootX or Open Firmware.

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