staging: mt7621-eth: Document ralink/mediatek SoC ethernet binding

Mediatek Gigabit Switch

=======================

The mediatek gigabit switch can be found on Mediatek SoCs.

Required properties:

- compatible: Should be "mediatek,mt7620-gsw", "mediatek,mt7621-gsw",

  "mediatek,mt7623-gsw"

- reg: Address and length of the register set for the device

- interrupts: Should contain the gigabit switches interrupt

Additional required properties for ARM based SoCs:

- mediatek,reset-pin: phandle describing the reset GPIO

- clocks: the clocks used by the switch

- clock-names: the names of the clocks listed in the clocks property

  these should be "trgpll", "esw", "gp2", "gp1"

- mt7530-supply: the phandle of the regulator used to power the switch

- mediatek,pctl-regmap: phandle to the port control regmap. this is used to

  setup the drive current

Optional properties:

- interrupt-parent: Should be the phandle for the interrupt controller

  that services interrupts for this device

Example:

gsw: switch@1b100000 {

	compatible = "mediatek,mt7623-gsw";

	reg = <0 0x1b110000 0 0x300000>;

	interrupt-parent = <&pio>;

	interrupts = <168 IRQ_TYPE_EDGE_RISING>;

	clocks = <&apmixedsys CLK_APMIXED_TRGPLL>,

		 <&ethsys CLK_ETHSYS_ESW>,

		 <&ethsys CLK_ETHSYS_GP2>,

		 <&ethsys CLK_ETHSYS_GP1>;

	clock-names = "trgpll", "esw", "gp2", "gp1";

	mt7530-supply = <&mt6323_vpa_reg>;

	mediatek,pctl-regmap = <&syscfg_pctl_a>;

	mediatek,reset-pin = <&pio 15 0>;

	status = "okay";

};

- verify devicetree documentation is consistent with code

Cc: NeilBrown <neil@brown.name>