Commit eaba603f authored by Xiubo Li's avatar Xiubo Li Committed by Mark Brown
Browse files

ASoC: fsl-esai: big-endian support 



For most platforms, the CPU and ESAI device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
is in BE mode.

Signed-off-by: default avatarXiubo Li <Li.Xiubo@freescale.com>
Acked-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 33529ec9

Documentation/devicetree/bindings/sound/fsl,esai.txt

+5 −0
Original line number Diff line number Diff line
@@ -34,6 +34,10 @@ Required properties: 
    that ESAI would work in the synchronous mode, which means all the settings

    for Receiving would be duplicated from Transmition related registers.



  - big-endian : If this property is absent, the native endian mode will

    be in use as default, or the big endian mode will be in use for all the

    device registers.



Example:



esai: esai@02024000 {
@@ -46,5 +50,6 @@ esai: esai@02024000 { 
	dma-names = "rx", "tx";

	fsl,fifo-depth = <128>;

	fsl,esai-synchronous;

	big-endian;

	status = "disabled";

};

sound/soc/fsl/fsl_esai.c

+4 −1
Original line number Diff line number Diff line
@@ -678,7 +678,7 @@ static bool fsl_esai_writeable_reg(struct device *dev, unsigned int reg) 
	}

}



static const struct regmap_config fsl_esai_regmap_config = {

static struct regmap_config fsl_esai_regmap_config = {

	.reg_bits = 32,

	.reg_stride = 4,

	.val_bits = 32,
@@ -704,6 +704,9 @@ static int fsl_esai_probe(struct platform_device *pdev) 
	esai_priv->pdev = pdev;

	strcpy(esai_priv->name, np->name);



	if (of_property_read_bool(np, "big-endian"))

		fsl_esai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;



	/* Get the addresses and IRQ */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	regs = devm_ioremap_resource(&pdev->dev, res);

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