Commit eaa9558d authored by Paul Cercueil's avatar Paul Cercueil Committed by Stephen Boyd
Browse files

clk: ingenic: jz4725b: Add UDC PHY clock 



Add clock for the USB Device Controller PHY.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 93dc07f8

drivers/clk/ingenic/jz4725b-cgu.c

+6 −0
Original line number Diff line number Diff line
@@ -205,6 +205,12 @@ static const struct ingenic_cgu_clk_info jz4725b_cgu_clocks[] = { 
		.parents = { JZ4725B_CLK_EXT512, JZ4725B_CLK_OSC32K, -1, -1 },

		.mux = { CGU_REG_OPCR, 2, 1},

	},



	[JZ4725B_CLK_UDC_PHY] = {

		"udc_phy", CGU_CLK_GATE,

		.parents = { JZ4725B_CLK_EXT, -1, -1, -1 },

		.gate = { CGU_REG_OPCR, 6, true },

	},

};



static void __init jz4725b_cgu_init(struct device_node *np)

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