ARM: exynos: MCPM: Restore big.LITTLE cpuidle support (ea9dd8f6) · Commits · 戴 / test

Call exynos_cpu_power_up(cpunr) unconditionally. This is needed by the big.LITTLE cpuidle driver and has no side-effects on other code paths. The additional soft-reset call during little core power up has been added to properly boot all cores on the Exynos5422-based boards with secure firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE CPUidle driver, which worked only on boards without secure firmware (like Peach-Pit/Pi Chromebooks). Apply the workaround only when board is running under secure firmware. Fixes: ("ARM: EXYNOS: reset Little cores when cpu is up") Signed-off-by:

Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:

Lukasz Luba <lukasz.luba@arm.com> Signed-off-by:

Krzysztof Kozlowski <krzk@kernel.org>

arch/arm/mach-exynos/mcpm-exynos.c

+7 −3

Original line number	Diff line number	Diff line
		@@ -26,6 +26,7 @@
		#define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30)

		static void __iomem *ns_sram_base_addr __ro_after_init;
		static bool secure_firmware __ro_after_init;

		/*
		* The common v7_exit_coherency_flush API could not be used because of the
		@@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;
		static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
		{
		unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
		bool state;

		pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
		if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER \|\|
		cluster >= EXYNOS5420_NR_CLUSTERS)
		return -EINVAL;

		if (!exynos_cpu_power_state(cpunr)) {
		state = exynos_cpu_power_state(cpunr);
		exynos_cpu_power_up(cpunr);

		if (!state && secure_firmware) {
		/*
		* This assumes the cluster number of the big cores(Cortex A15)
		* is 0 and the Little cores(Cortex A7) is 1.
		@@ -258,6 +260,8 @@ static int __init exynos_mcpm_init(void)
		return -ENOMEM;
		}

		secure_firmware = exynos_secure_firmware_available();

		/*
		* To increase the stability of KFC reset we need to program
		* the PMU SPARE3 register

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