Commit ea5a2e4d authored by Tony Lindgren's avatar Tony Lindgren
Browse files

bus: ti-sysc: Do rstctrl reset handling in two phases 



We need to deassert rstctrl resets before enabling clocks to avoid clock
"failed to enable" errors. For asserting rstctrl reset, the clocks need
to be enabled.

As the reset controller status is not available for arrays, let's use
devm_reset_control_get_optional() so we can get the status after reset.

Note that depends on a proper PRM rstctrl driver, so far I've only
tested this with earlier reset-simple patches.

Tested-by: default avatarKeerthy <j-keerthy@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 8383e259

drivers/bus/ti-sysc.c

+17 −8
Original line number Diff line number Diff line
@@ -497,7 +497,7 @@ static void sysc_clkdm_allow_idle(struct sysc *ddata) 
static int sysc_init_resets(struct sysc *ddata)

{

	ddata->rsts =

		devm_reset_control_array_get_optional_exclusive(ddata->dev);

		devm_reset_control_get_optional(ddata->dev, "rstctrl");

	if (IS_ERR(ddata->rsts))

		return PTR_ERR(ddata->rsts);
@@ -1420,7 +1420,7 @@ static int sysc_legacy_init(struct sysc *ddata) 
 */

static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)

{

	int error;

	int error, val;



	if (!ddata->rsts)

		return 0;
@@ -1431,7 +1431,14 @@ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) 
			return error;

	}



	return reset_control_deassert(ddata->rsts);

	error = reset_control_deassert(ddata->rsts);

	if (error == -EEXIST)

		return 0;



	error = readx_poll_timeout(reset_control_status, ddata->rsts, val,

				   val == 0, 100, MAX_MODULE_SOFTRESET_WAIT);



	return error;

}



/*
@@ -1489,12 +1496,8 @@ static int sysc_init_module(struct sysc *ddata) 
{

	int error = 0;

	bool manage_clocks = true;

	bool reset = true;



	if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)

		reset = false;



	error = sysc_rstctrl_reset_deassert(ddata, reset);

	error = sysc_rstctrl_reset_deassert(ddata, false);

	if (error)

		return error;
@@ -1518,6 +1521,12 @@ static int sysc_init_module(struct sysc *ddata) 
			goto err_opt_clocks;

	}



	if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) {

		error = sysc_rstctrl_reset_deassert(ddata, true);

		if (error)

			goto err_main_clocks;

	}



	ddata->revision = sysc_read_revision(ddata);

	sysc_init_revision_quirks(ddata);

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