Commit e951445f authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvmarm-fixes-5.6-1' of... 

Merge tag 'kvmarm-fixes-5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/arm fixes for 5.6, take #1

- Fix compilation on 32bit
- Move  VHE guest entry/exit into the VHE-specific entry code
- Make sure all functions called by the non-VHE HYP code is tagged as __always_inline
parents ef935c25 e43f1331

arch/arm/include/asm/kvm_host.h

+0 −3
Original line number Diff line number Diff line
@@ -392,9 +392,6 @@ static inline void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) {} 
static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {}

static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {}



static inline void kvm_arm_vhe_guest_enter(void) {}

static inline void kvm_arm_vhe_guest_exit(void) {}



#define KVM_BP_HARDEN_UNKNOWN		-1

#define KVM_BP_HARDEN_WA_NEEDED		0

#define KVM_BP_HARDEN_NOT_REQUIRED	1

arch/arm64/include/asm/arch_gicv3.h

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ static inline void gic_write_eoir(u32 irq) 
	isb();

}



static inline void gic_write_dir(u32 irq)

static __always_inline void gic_write_dir(u32 irq)

{

	write_sysreg_s(irq, SYS_ICC_DIR_EL1);

	isb();

arch/arm64/include/asm/cache.h

+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static inline int icache_is_aliasing(void) 
	return test_bit(ICACHEF_ALIASING, &__icache_flags);

}



static inline int icache_is_vpipt(void)

static __always_inline int icache_is_vpipt(void)

{

	return test_bit(ICACHEF_VPIPT, &__icache_flags);

}

arch/arm64/include/asm/cacheflush.h

+1 −1
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, 
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1

extern void flush_dcache_page(struct page *);



static inline void __flush_icache_all(void)

static __always_inline void __flush_icache_all(void)

{

	if (cpus_have_const_cap(ARM64_HAS_CACHE_DIC))

		return;

arch/arm64/include/asm/cpufeature.h

+5 −5
Original line number Diff line number Diff line
@@ -435,13 +435,13 @@ cpuid_feature_extract_signed_field(u64 features, int field) 
	return cpuid_feature_extract_signed_field_width(features, field, 4);

}



static inline unsigned int __attribute_const__

static __always_inline unsigned int __attribute_const__

cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)

{

	return (u64)(features << (64 - width - field)) >> (64 - width);

}



static inline unsigned int __attribute_const__

static __always_inline unsigned int __attribute_const__

cpuid_feature_extract_unsigned_field(u64 features, int field)

{

	return cpuid_feature_extract_unsigned_field_width(features, field, 4);
@@ -564,7 +564,7 @@ static inline bool system_supports_mixed_endian(void) 
	return val == 0x1;

}



static inline bool system_supports_fpsimd(void)

static __always_inline bool system_supports_fpsimd(void)

{

	return !cpus_have_const_cap(ARM64_HAS_NO_FPSIMD);

}
@@ -575,13 +575,13 @@ static inline bool system_uses_ttbr0_pan(void) 
		!cpus_have_const_cap(ARM64_HAS_PAN);

}



static inline bool system_supports_sve(void)

static __always_inline bool system_supports_sve(void)

{

	return IS_ENABLED(CONFIG_ARM64_SVE) &&

		cpus_have_const_cap(ARM64_SVE);

}



static inline bool system_supports_cnp(void)

static __always_inline bool system_supports_cnp(void)

{

	return IS_ENABLED(CONFIG_ARM64_CNP) &&

		cpus_have_const_cap(ARM64_HAS_CNP);

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