Commit e8c034b2 authored by Yao Yuan's avatar Yao Yuan Committed by Brian Norris
Browse files

mtd: spi-nor: fsl-quadspi: add support for ls1021a



LS1021a also support Freescale Quad SPI controller.
Add fsl-quadspi support for ls1021a chip and make SPI_FSL_QUADSPI
selectable for LS1021A SOC hardwares.

Signed-off-by: default avatarYuan Yao <yao.yuan@nxp.com>
Acked-by: default avatarHan xu <han.xu@freescale.com>
Acked-by: default avatarHan xu <han.xu@nxp.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 2012850b
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+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ config MTD_SPI_NOR_USE_4K_SECTORS

config SPI_FSL_QUADSPI
	tristate "Freescale Quad SPI controller"
	depends on ARCH_MXC || COMPILE_TEST
	depends on ARCH_MXC || SOC_LS1021A || COMPILE_TEST
	depends on HAS_IOMEM
	help
	  This enables support for the Quad SPI controller in master mode.
+10 −0
Original line number Diff line number Diff line
@@ -213,6 +213,7 @@ enum fsl_qspi_devtype {
	FSL_QUADSPI_IMX6SX,
	FSL_QUADSPI_IMX7D,
	FSL_QUADSPI_IMX6UL,
	FSL_QUADSPI_LS1021A,
};

struct fsl_qspi_devtype_data {
@@ -258,6 +259,14 @@ static struct fsl_qspi_devtype_data imx6ul_data = {
		       | QUADSPI_QUIRK_4X_INT_CLK,
};

static struct fsl_qspi_devtype_data ls1021a_data = {
	.devtype = FSL_QUADSPI_LS1021A,
	.rxfifo = 128,
	.txfifo = 64,
	.ahb_buf_size = 1024,
	.driver_data = 0,
};

#define FSL_QSPI_MAX_CHIP	4
struct fsl_qspi {
	struct spi_nor nor[FSL_QSPI_MAX_CHIP];
@@ -812,6 +821,7 @@ static const struct of_device_id fsl_qspi_dt_ids[] = {
	{ .compatible = "fsl,imx6sx-qspi", .data = (void *)&imx6sx_data, },
	{ .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, },
	{ .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, },
	{ .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids);