Commit e8b3a426 authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge tag 'rds-odp-for-5.5' into rdma.git for-next

From https://git.kernel.org/pub/scm/linux/kernel/git/leon/linux-rdma



Leon Romanovsky says:

====================
Use ODP MRs for kernel ULPs

The following series extends MR creation routines to allow creation of
user MRs through kernel ULPs as a proxy. The immediate use case is to
allow RDS to work over FS-DAX, which requires ODP (on-demand-paging)
MRs to be created and such MRs were not possible to create prior this
series.

The first part of this patchset extends RDMA to have special verb
ib_reg_user_mr(). The common use case that uses this function is a
userspace application that allocates memory for HCA access but the
responsibility to register the memory at the HCA is on an kernel ULP.
This ULP acts as an agent for the userspace application.

The second part provides advise MR functionality for ULPs. This is
integral part of ODP flows and used to trigger pagefaults in advance
to prepare memory before running working set.

The third part is actual user of those in-kernel APIs.
====================

* tag 'rds-odp-for-5.5':
  net/rds: Use prefetch for On-Demand-Paging MR
  net/rds: Handle ODP mr registration/unregistration
  net/rds: Detect need of On-Demand-Paging memory registration
  RDMA/mlx5: Fix handling of IOVA != user_va in ODP paths
  IB/mlx5: Mask out unsupported ODP capabilities for kernel QPs
  RDMA/mlx5: Don't fake udata for kernel path
  IB/mlx5: Add ODP WQE handlers for kernel QPs
  IB/core: Add interface to advise_mr for kernel users
  IB/core: Introduce ib_reg_user_mr
  IB: Allow calls to ib_umem_get from kernel ULPs

Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parents eaad647e b2dfc676
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+5 −5
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@@ -251,11 +251,11 @@ selectively from different subsystems.
.. code-block:: c

    struct kcov_remote_arg {
	unsigned	trace_mode;
	unsigned	area_size;
	unsigned	num_handles;
	uint64_t	common_handle;
	uint64_t	handles[0];
	__u32		trace_mode;
	__u32		area_size;
	__u32		num_handles;
	__aligned_u64	common_handle;
	__aligned_u64	handles[0];
    };

    #define KCOV_INIT_TRACE			_IOR('c', 1, unsigned long)
+4 −2
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@@ -18,8 +18,10 @@ Optional properties:
- dma-names: should contain "tx" and "rx".
- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
  capable I2C controllers.
- i2c-sda-hold-time-ns: TWD hold time, only available for "atmel,sama5d4-i2c"
  and "atmel,sama5d2-i2c".
- i2c-sda-hold-time-ns: TWD hold time, only available for:
	"atmel,sama5d4-i2c",
	"atmel,sama5d2-i2c",
	"microchip,sam9x60-i2c".
- Child nodes conforming to i2c bus binding

Examples :
+2 −2
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@@ -111,7 +111,7 @@ patternProperties:
      spi-rx-bus-width:
        allOf:
          - $ref: /schemas/types.yaml#/definitions/uint32
          - enum: [ 1, 2, 4 ]
          - enum: [ 1, 2, 4, 8 ]
          - default: 1
        description:
          Bus width to the SPI bus used for MISO.
@@ -123,7 +123,7 @@ patternProperties:
      spi-tx-bus-width:
        allOf:
          - $ref: /schemas/types.yaml#/definitions/uint32
          - enum: [ 1, 2, 4 ]
          - enum: [ 1, 2, 4, 8 ]
          - default: 1
        description:
          Bus width to the SPI bus used for MOSI.
+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
    |    openrisc: | TODO |
    |      parisc: | TODO |
    |     powerpc: |  ok  |
    |       riscv: | TODO |
    |       riscv: |  ok  |
    |        s390: |  ok  |
    |          sh: |  ok  |
    |       sparc: | TODO |
+0 −6
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@@ -230,12 +230,6 @@ simultaneously on two ports. The driver checks the consistency of the schedules
against this restriction and errors out when appropriate. Schedule analysis is
needed to avoid this, which is outside the scope of the document.

At the moment, the time-aware scheduler can only be triggered based on a
standalone clock and not based on PTP time. This means the base-time argument
from tc-taprio is ignored and the schedule starts right away. It also means it
is more difficult to phase-align the scheduler with the other devices in the
network.

Device Tree bindings and board design
=====================================

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