Commit e88ba436 authored Apr 29, 2020 by Tero Kristo Committed by Tony Lindgren May 05, 2020

ARM: OMAP5: Make L4SEC clock domain SWSUP only



Commit c2ce5fb3 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP5, so do the same change
for OMAP5 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

parent f18e314a

arch/arm/mach-omap2/clockdomains54xx_data.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -170,7 +170,7 @@ static struct clockdomain l4sec_54xx_clkdm = {
		.dep_bit = OMAP54XX_L4SEC_STATDEP_SHIFT,
		.wkdep_srcs = l4sec_wkup_sleep_deps,
		.sleepdep_srcs = l4sec_wkup_sleep_deps,
		.flags = CLKDM_CAN_HWSUP_SWSUP,
		.flags = CLKDM_CAN_SWSUP,
		};

		static struct clockdomain iva_54xx_clkdm = {

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