crypto: ccree - fix typos in comments (e86eca41) · Commits · 戴 / test

drivers/crypto/ccree/cc_driver.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -133,7 +133,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id)
		u32 imr;

		/* STAT_OP_TYPE_GENERIC STAT_PHASE_0: Interrupt */
		/* if driver suspended return, probebly shared interrupt */
		/* if driver suspended return, probably shared interrupt */
		if (cc_pm_is_dev_suspended(dev))
		return IRQ_NONE;

drivers/crypto/ccree/cc_fips.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -120,7 +120,7 @@ static void fips_dsr(unsigned long devarg)
		cc_tee_handle_fips_error(drvdata);
		}

		/* after verifing that there is nothing to do,
		/* after verifying that there is nothing to do,
		* unmask AXI completion interrupt.
		*/
		val = (CC_REG(HOST_IMR) & ~irq);

drivers/crypto/ccree/cc_pm.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -114,7 +114,7 @@ int cc_pm_init(struct cc_drvdata *drvdata)
		{
		struct device *dev = drvdata_to_dev(drvdata);

		/* must be before the enabling to avoid resdundent suspending */
		/* must be before the enabling to avoid redundant suspending */
		pm_runtime_set_autosuspend_delay(dev, CC_SUSPEND_TIMEOUT);
		pm_runtime_use_autosuspend(dev);
		/* activate the PM module */

drivers/crypto/ccree/cc_request_mgr.c

+6 −6

Original line number	Diff line number	Diff line
		@@ -230,7 +230,7 @@ static int cc_queues_status(struct cc_drvdata *drvdata,
		struct device *dev = drvdata_to_dev(drvdata);

		/* SW queue is checked only once as it will not
		* be chaned during the poll because the spinlock_bh
		* be changed during the poll because the spinlock_bh
		* is held by the thread
		*/
		if (((req_mgr_h->req_queue_head + 1) & (MAX_REQUEST_QUEUE_SIZE - 1)) ==
		@@ -303,8 +303,8 @@ static int cc_do_send_request(struct cc_drvdata *drvdata,

		/*
		* We are about to push command to the HW via the command registers
		* that may refernece hsot memory. We need to issue a memory barrier
		* to make sure there are no outstnading memory writes
		* that may reference host memory. We need to issue a memory barrier
		* to make sure there are no outstanding memory writes
		*/
		wmb();

		@@ -532,8 +532,8 @@ int send_request_init(struct cc_drvdata drvdata, struct cc_hw_desc desc,

		/*
		* We are about to push command to the HW via the command registers
		* that may refernece hsot memory. We need to issue a memory barrier
		* to make sure there are no outstnading memory writes
		* that may reference host memory. We need to issue a memory barrier
		* to make sure there are no outstanding memory writes
		*/
		wmb();
		enqueue_seq(drvdata, desc, len);
		@@ -668,7 +668,7 @@ static void comp_handler(unsigned long devarg)
		request_mgr_handle->axi_completed += cc_axi_comp_count(drvdata);
		}

		/* after verifing that there is nothing to do,
		/* after verifying that there is nothing to do,
		* unmask AXI completion interrupt
		*/
		cc_iowrite(drvdata, CC_REG(HOST_IMR),

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