Commit e85d68fa authored by Steven Price's avatar Steven Price Committed by Will Deacon
Browse files

arm64: Rename WORKAROUND_1165522 to SPECULATIVE_AT_VHE 



Cortex-A55 is affected by a similar erratum, so rename the existing
workaround for errarum 1165522 so it can be used for both errata.

Acked-by: default avatarMarc Zyngier <maz@kernel.org>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarSteven Price <steven.price@arm.com>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 46cf053e

arch/arm64/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -514,9 +514,13 @@ config ARM64_ERRATUM_1418040 


	  If unsure, say Y.



config ARM64_WORKAROUND_SPECULATIVE_AT_VHE

	bool



config ARM64_ERRATUM_1165522

	bool "Cortex-A76: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"

	default y

	select ARM64_WORKAROUND_SPECULATIVE_AT_VHE

	help

	  This option adds a workaround for ARM Cortex-A76 erratum 1165522.

arch/arm64/include/asm/cpucaps.h

+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ 
#define ARM64_SSBS				34

#define ARM64_WORKAROUND_1418040		35

#define ARM64_HAS_SB				36

#define ARM64_WORKAROUND_1165522		37

#define ARM64_WORKAROUND_SPECULATIVE_AT_VHE	37

#define ARM64_HAS_ADDRESS_AUTH_ARCH		38

#define ARM64_HAS_ADDRESS_AUTH_IMP_DEF		39

#define ARM64_HAS_GENERIC_AUTH_ARCH		40

arch/arm64/include/asm/kvm_host.h

+1 −1
Original line number Diff line number Diff line
@@ -571,7 +571,7 @@ static inline bool kvm_arch_requires_vhe(void) 
		return true;



	/* Some implementations have defects that confine them to VHE */

	if (cpus_have_cap(ARM64_WORKAROUND_1165522))

	if (cpus_have_cap(ARM64_WORKAROUND_SPECULATIVE_AT_VHE))

		return true;



	return false;

arch/arm64/include/asm/kvm_hyp.h

+1 −1
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ static __always_inline void __hyp_text __load_guest_stage2(struct kvm *kvm) 
	 * before we can switch to the EL1/EL0 translation regime used by

	 * the guest.

	 */

	asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_1165522));

	asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT_VHE));

}



#endif /* __ARM64_KVM_HYP_H__ */

arch/arm64/kernel/cpu_errata.c

+13 −4
Original line number Diff line number Diff line
@@ -757,6 +757,16 @@ static const struct arm64_cpu_capabilities erratum_843419_list[] = { 
};

#endif



#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE

static const struct midr_range erratum_speculative_at_vhe_list[] = {

#ifdef CONFIG_ARM64_ERRATUM_1165522

	/* Cortex A76 r0p0 to r2p0 */

	MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

#endif

	{},

};

#endif



const struct arm64_cpu_capabilities arm64_errata[] = {

#ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE

	{
@@ -883,12 +893,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
		ERRATA_MIDR_RANGE_LIST(erratum_1418040_list),

	},

#endif

#ifdef CONFIG_ARM64_ERRATUM_1165522

#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE

	{

		/* Cortex-A76 r0p0 to r2p0 */

		.desc = "ARM erratum 1165522",

		.capability = ARM64_WORKAROUND_1165522,

		ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),

		.capability = ARM64_WORKAROUND_SPECULATIVE_AT_VHE,

		ERRATA_MIDR_RANGE_LIST(erratum_speculative_at_vhe_list),

	},

#endif

#ifdef CONFIG_ARM64_ERRATUM_1463225

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