Commit e83c045e authored by Petr Machata's avatar Petr Machata Committed by David S. Miller
Browse files

mlxsw: spectrum_buffers: Configure MC pool 



Pool 15 (indexed as 8) is dedicated to MC traffic. Its configuration has
been kept at default, because the table-based configuration wasn't
expressive enough to allow the explicit configuration.

Now that the configuration of pool 15 can be described, do so. The MC
pool should have infinite size, infinite per-TC quota, and per-port
limit of 90K.

Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5be3637e

drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c

+10 −8
Original line number Diff line number Diff line
@@ -320,6 +320,7 @@ static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs[] = { 
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),

	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),

	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),

	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, MLXSW_SP_SB_INFI),

};



#define MLXSW_SP_SB_PRS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs)
@@ -380,14 +381,14 @@ static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = { 
	MLXSW_SP_SB_CM(1500, 9, 4),

	MLXSW_SP_SB_CM(1500, 9, 4),

	MLXSW_SP_SB_CM(1500, 9, 4),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, 13440000, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),

	MLXSW_SP_SB_CM(1, 0xff, 4),

};
@@ -523,6 +524,7 @@ static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = { 
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),

	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),

	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),

	MLXSW_SP_SB_PM(10000, 90000),

};



#define MLXSW_SP_SB_PMS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms)

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